CCLD-033 5x7mm SMD
LVDS Clock Oscillator
3.3 Volts
Model CCLD-033 is a 77.760Mhz to 161.000MHz LVDS
Clock Oscillator operating at 3.3Volts. The oscillator utlizes
a High Q Third Overtone crystal design providing very low
Jitter and Phase Noise. No Sub-Harmonics are present in
the Output Signal.
5x7mm SMD
Applications:
Digital Video
SONET/SDH/DWDM
Storage Area Networks
Broadband Access
Ethernet, Gigabit Ethernet
Rev.: D
Date: 10-10-07
CCLD-033 5x7mm SMD
LVDS Clock Oscillator
Frequency Range:
Frequency Stability Options(ppm):
Temperature Range: (standard)
(Option M)
(Option X)
Storage:
Input Voltage:
Input Current:
Output:
Symmetry:
Rise/Fall Time:
Load: 100 Ohms
Logic:
Output Voltage Levels
77.760Mhz to 161.000Mhz
±20, ±25, ±50, ±100
0°C to +70°C
-20°C to +70°C
-40°C to +85°C
-55°C to 120°C
3.3V ± 0.3V
45mA Typ., 66mA Max
Differential LVDS
45/55% Max @ 50%Vdd
1nsec Max @ 20% to 80% Vdd
Connected between OUT and COUT
“0”=0.90 Min., 1.10 Typ.
“1”=1.43 Typ., 1.60 Max
247mV Min., 454mV Max
200nSec Max
2mSec Max
0.5psec Typ., 1psec RMS Max
Differential Output Voltage:
Disable Time
Enable Time
Phase Jitter:
12KHz~80MHz
Phase Noise:
(See Plot Below)
Sub-harmonics:
None
Aging:
<3ppm 1st/yr, <1ppm every year thereafter
Typical Phase Noise Plot
Rev.: D
Date: 10-10-07
CCLD-033 5x7mm SMD
LVDS Clock Oscillator
PART NUMBER GUIDE
CCLD - 033 X - 50 - 155.520
#1
#2 #3
#4
#5
#1 Crystek LVDS Osc.
#2 Model 033
#3 Temp. Range (Blank=0/70
°C)(
M=-20/70
°C)(
X=-40/85
°C)
#4 Stability: (see Table 1)
#5 Frequency in MHz: 3 or 6 decimal places
Blank(std)
50
25
20
Stability Indicator
±100ppm
±50ppm
±25ppm
±20ppm
Example:
CCLD-033X-50-155.520
3.3V, -40/85°C, ±50ppm, 155.520 MHz
Table 1
Thermal Shock:
MIL-STD-883, Method 1011, Condition A
Moisture Resistance:
MIL-STD-883, Method 1004
Environmental:
TEMPERATURE
Shock:
Solderability:
Vibration:
Solvent Resistance:
Resistance to Soldering Heat:
Mechanical:
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 2003
MIL-STD-883, Method 2007, Condition A
MIL-STD-202, Method 215
MIL-STD-202, Method 210, Condition I or J
RECOMMENDED REFLOW SOLDERING PROFILE
260°C
217°C
200°C
150°C
Ramp-Up
3°C/Sec Max.
Critical
Temperature Zone
Ramp-Down
6°C/Sec.
Preheat
180 Secs. Max.
8 Minutes Max.
90 Secs. Max.
260°C for
10 Secs. Max.
NOTE: Reflow Profile with 240°C peak also acceptable.
0.274 ±0.007
(6.96 ±0.18)
Tri-State Function
0.193 ±0.007
(4.90 ±0.18)
0.045 ±0.008
(1.14 ±0.20)
Part Number
Frequency
DC Lot Code
Open or N/C
Pin #1
State
Denotes pad 1
0.055 Typ
(1.40 Typ)
0.045 ±0.008
(1.14 ±0.20)
#1
#6
#2
#5
#3
#4
“1” level 0.7*Vcc Min
SUGGESTED PAD LAYOUT
0.071 SQ
(1.80)
Active
Active
High Z
Output
State
“0”level 0.3*Vcc Max
Pad
1
2
3
4
5
6
0.148
(3.75)
Connection
N/C
GND
Out
Comp. Out
VCC
Enable/Disable
0.100
(2.54)
0.200
(5.08)
0.200
(5.08)
0.01uF Bypass Capacitor Recommended
Rev.: D
Date: 10-10-07
DSP and ARM Processors
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