DATA SHEET
MOS INTEGRATED CIRCUIT
μ
PD43257B
256K-BIT CMOS STATIC RAM
32K-WORD BY 8-BIT
Description
The
μ
PD43257B is a high speed, low power, and 262,144 bits (32,768 words by 8 bits) CMOS static RAM.
Battery backup is available. And the
μ
PD43257B has two chip enable pins (/CE1, CE2) to extend the capacity.
The
μ
PD43257B is packed in 28-pin PLASTIC DIP and 28-pin PLASTIC SOP.
Features
•
32,768 words by 8 bits organization
•
Fast access time: 70, 85 ns (MAX.)
•
Low V
CC
data retention: 2.0 V (MIN.)
•
Two Chip Enable inputs: /CE1, CE2
Part number
Access time
ns (MAX.)
Operating supply Operating ambient
voltage
V
temperature
°C
0 to 70
At operating
mA (MAX.)
45
45
Supply current
At standby
At data retention
μ
A (MAX.)
50
15
μ
A (MAX.)
Note
3
2
μ
PD43257B-xxL
μ
PD43257B-xxLL
70, 85
4.5 to 5.5
Note
T
A
≤
40
°C,
V
CC
= 3.0 V
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. M10693EJ9V0DS00 (9th edition)
Date Published June 2006 NS CP (K)
Printed in Japan
1992
μ
PD43257B
Pin Configurations (Marking Side)
/xxx indicates active low signal.
28-pin PLASTIC DIP (15.24 mm (600))
[
μ
PD43257BCZ-xxL ]
[
μ
PD43257BCZ-xxLL ]
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
/WE
A13
A8
A9
A11
CE2
A10
/CE1
I/O8
I/O7
I/O6
I/O5
I/O4
A0 - A14
I/O1 - I/O8
/CE1
CE2
/WE
V
CC
GND
: Address inputs
: Data inputs / outputs
: Chip Enable 1
: Chip Enable 2
: Write Enable
: Power supply
: Ground
Remark
Refer to
Package Drawings
for the 1-pin marking.
Data Sheet M10693EJ9V0DS
3
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