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Table of Contents
1. DESCRIPTION ................................................................................................................1
2. FEATURES......................................................................................................................1
3. BLOCK DIAGRAM ..........................................................................................................1
4. PIN ASSIGNMENT ..........................................................................................................2
5. PIN DESCRIPTION .........................................................................................................3
5.1 LVDS input pin ..............................................................................................................................3
5.2 LVDS output pin ............................................................................................................................3
5.3 Setting pin .....................................................................................................................................3
5.4 Pins associated with power supply.............................................................................................4
6. FUNCTIONAL DESCRIPTION ........................................................................................5
6.1 LVDS data mapping ......................................................................................................................5
6.2 LVDS input Hi-Z detect circuit......................................................................................................5
6.3 Termination resistor .....................................................................................................................5
7. ELECTRICAL CHARACTERISTICS ...............................................................................6
7.1 Absolute Maximum Ratings .........................................................................................................6
7.2 Recommended Operating Conditions.........................................................................................6
7.3 CMOS input/output characteristics .............................................................................................6
7.4 LVDS input characteristics...........................................................................................................6
7.5 LVDS Input Timing Characteristics .............................................................................................7
7.6 Clock input/output delay characteristics....................................................................................8
7.7 Clock input/data output delay characteristics............................................................................8
7.8 Output clock duty .........................................................................................................................8
7.9 DLL lockup time characteristics..................................................................................................8
7.10 Current Consumption.................................................................................................................8
8. EXTERNAL DIMENSIONS ..............................................................................................9
9. REVISION HISTORY .....................................................................................................10
S1R77084F00A000 Technical Manual (Rev.0.2)
EPSON
i
1. DESCRIPTION
1. DESCRIPTION
This IC “S1R77084” is a LVDS receiver IC.
S1R77084 recieves the 3 channels LVDS data stream and restore it to 21 bits CMOS/TTL data.
When transmitter clock frequency is 115 MHz, 21 bits CMOS/TTL data is transferred at 805Mbps per
channel. When using 115 MHz clock, total throughput is 2.415Gbps (301 Mbytes/s).
“S1R77094”
is recommended to use for LVDS transmitter IC.
Used in combination with “Analog front-end IC”, this IC enables you to provide the optimal chipset for a
high-speed scanner system.
2. FEATURES
Converts 3 channels LVDS input into 21 bits CMOS/TTL output
Wide range clock frequency: 20 MHz to 115 MHz
301 Mbytes/s throughput
3.3V single power supply
Power-Down Function
Low-power CMOS process
QFP-48 pin package
Radiation shield not included.
3. BLOCK DIAGRAM
RA+
RA-
RA[6;0]
Serial to Parallel
RB+
RB-
RB[6;0]
RC+
RC-
RC[6;0]
RCLK+
RCLK-
PLL
CLKOUT
PDX
R/F
OE
TEST[5;0]
S1R77084F00A000 Technical Manual (Rev.0.2)
EPSON
1
Embedded System
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