SPANSION Flash Memory
Data Sheet
TM
September 2003
TM
This document specifies SPANSION memory products that are now offered by both Advanced Micro Devices and
Fujitsu. Although the document is marked with the name of the company that originally developed the specification,
these products will be offered to customers of both AMD and Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a SPANSION
revisions will occur when appropriate, and changes will be noted in a revision summary.
TM
product. Future routine
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with "Am" and "MBM". To order these
products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about SPANSION
solutions.
TM
memory
FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-20876-3E
FLASH MEMORY
CMOS
4 M (512 K
×
8) BIT
MBM29F004TC/004BC-
70/
-
90
s
DESCRIPTION
The MBM29F004TC/BC is a 4 M-bit, 5.0 V-Only Flash memory organized as 512 K bytes of 8 bits each. The
MBM29F004TC/BC is offered in a 32-pin TSOP (1) and 32-pin QFJ (PLCC) packages. This device is designed
to be programmed in-system with the standard system 5.0 V V
CC
supply. A 12.0 V V
PP
is not required for write or
erase operations. The device can also be reprogrammed in standard EPROM programmers.
The standard MBM29F004TC/BC offers access times between 70 ns and 90 ns allowing operation of high-speed
microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE) , write
enable (WE) , and output enable (OE) controls.
The MBM29F004TC/BC is pin and command set compatible with JEDEC standard E
2
PROMs. Commands are
written to the command register using standard microprocessor write timings. Register contents serve as input
to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch
addresses and data needed for the programming and erase operations. Reading data out of the device is similar
to reading from 12.0 V Flash or EPROM devices.
(Continued)
s
PRODUCT LINE UP
Part No.
Ambient Temperature (
°C)
Max Address Access Time (ns)
V
CC
Supply Voltage
Operation
Erase/Program
Voltage Consumption
(mW) (Max) TTL Standby mode
CMOS Standby mode
Max CE Access (ns)
Max OE Access (ns)
70
30
MBM29F004TC/BC
-70
−20
to
+
70
70
5.0 V
±
10%
193
275
5.5
0.0275
90
35
-90
−40
to
+
85
90
MBM29F004TC/004BC
-70/90
(Continued)
The MBM29F004TC/BC is programmed by executing the program command sequence. This will invoke the
Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths
and verifies proper cell margin. Each sector can be programmed and verified in less than 0.5 seconds. Erase
is accomplished by executing the erase command sequence. This will invoke the Embedded Erase Algorithm
which is an internal algorithm that automatically preprograms the array if it is not already programmed before
executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies
proper cell margin. Any individual sector is typically erased and verified within 1.0 second (if already completely
preprogrammed) .
This device also features a sector erase architecture. The sector erase mode allows for sectors of memory to
be erased and reprogrammed without affecting other sectors. The MBM29F004TC/BC is erased when shipped
from the factory.
The MBM29F004TC/BC device also features hardware sector group protection. This feature will disable both
program and erase operations in any combination of sectors of memory. This can be achieved in-system or via
programming equipment.
Fujitsu has implemented an Erase Suspend feature that enables the user to put erase on hold for any period of
time to read data from or program data to a non-busy sector. True background erase can thus be achieved.
The device features single 5.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low V
CC
detector automatically
inhibits write operations during power transitions. The end of program or erase is detected by Data Polling of
DQ
7
, or by the Toggle Bit I feature on DQ
6
output pin. Once the end of a program or erase cycle has been
completed, the device internally resets to the read mode.
Fujitsu's Flash technology combines years of EPROM and E
2
PROM experience to produce the highest levels
of quality, reliability, and cost effectiveness. The MBM29F004TC/BC memory electrically erases all bits within
a sector simultaneously via Fowler-Nordheim tunneling. The bytes are programmed one byte at a time using
the EPROM programming mechanism of hot electron injection.
s
PACKAGE
32-pin plastic TSOP (1)
Marking Side
32-pin plastic TSOP (1)
32-pin plastic QFJ (PLCC)
Marking Side
(FPT-32P-M24)
(FPT-32P-M25)
(LCC-32P-M02)
2
MBM29F004TC/004BC
-70/90
s
FEATURES
•
Single 5.0 V read, write, and erase
Minimizes system level power requirements
•
Compatible with JEDEC-standard commands
Pinout and software compatible with single-power supply Flash
Superior inadvertent write protection
• 32-pin TSOP (1) (Package Suffix : PFTN-Normal Bend Type, PFTR-Reverse Bend Type)
32-pin PLCC (Package Suffix : PD)
• Minimum 100,000 write/erase cycles
•
High performance
70 ns maximum access time
•
Flexible sector erase architecture
One 16 K byte, two 8 K bytes, one 32 K byte, and seven 64 K bytes sectors
Any combination of sectors can be erased. Also supports full chip erase.
•
Embedded Erase™* Algorithms
Automatically pre-programs and erases the chip or any sector
•
Embedded Program™* Algorithms
Automatically programs and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
•
Low V
CC
write inhibit
≤
3.2 V
•
Erase Suspend/Resume
Supports reading or programming data to a sector not being erased
•
Sector Protection
Hardware sector protect that disables any combination of sectors from write or erase operations
•
Temporary Sector Unprotection
Temporary sector unprotection via the command sequence
• Boot Code Sector Architecture
• Fast Programming
• Extended Sector Protection
*: Embedded Erase™, Embedded Program™ and ExpressFlash™ are trademarks of Advanced Micro Devices, Inc.
3
MBM29F004TC/004BC
-70/90
s
PIN ASSIGNMENTS
TSOP (1)
A
11
A
9
A
8
A
13
A
14
A
17
WE
V
CC
A
18
A
16
A
15
A
12
A
7
A
6
A
5
A
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
(Marking Side)
Normal Bend
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A
10
CE
DQ
7
DQ
6
DQ
5
DQ
4
DQ
3
V
SS
DQ
2
DQ
1
DQ
0
A
0
A
1
A
2
A
3
(FPT-32P-M24)
A
4
A
5
A
6
A
7
A
12
A
15
A
16
A
18
V
CC
WE
A
17
A
14
A
13
A
8
A
9
A
11
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
(Marking Side)
Reverse Bend
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A
3
A
2
A
1
A
0
DQ
0
DQ
1
DQ
2
V
SS
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
CE
A
10
OE
(FPT-32P-M25)
(Continued)
4
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