PALCE16V8Z-15JC datasheet, PDF

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PALCE16V8Z-15JC: DescriptionEE PLD, 15ns, PAL-Type, CMOS, PQCC20, PLASTIC, LCC-20; CategoryProgrammable logic devices Programmable logic; File Size659KB，22 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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PALCE16V8Z-15JC Overview

EE PLD, 15ns, PAL-Type, CMOS, PQCC20, PLASTIC, LCC-20

PALCE16V8Z-15JC Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	QLCC
package instruction	QCCJ, LDCC20,.4SQ
Contacts	20
Reach Compliance Code	unknown
Other features	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK
Architecture	PAL-TYPE
maximum clock frequency	50 MHz
JESD-30 code	S-PQCC-J20
JESD-609 code	e0
length	8.9662 mm
Dedicated input times	8
Number of I/O lines	8
Number of entries	18
Output times	8
Number of product terms	64
Number of terminals	20
Maximum operating temperature	75 °C
Minimum operating temperature
organize	8 DEDICATED INPUTS, 8 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC20,.4SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	EE PLD
propagation delay	15 ns
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	8.9662 mm
Base Number Matches	1

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PALCE16V8Z-15JC Related Products

	PALCE16V8Z-15JC	PALCE16V8Z-15PC	PALCE16V8Z-25JC	PALCE16V8Z-15JI	PALCE16V8Z-25PC	PALCE16V8Z-25PI	PALCE16V8Z-15PI	PALCE16V8Z-25JI
Description	EE PLD, 15ns, PAL-Type, CMOS, PQCC20, PLASTIC, LCC-20	EE PLD, 15ns, PAL-Type, CMOS, PDIP20, PLASTIC, DIP-20	EE PLD, 25ns, PAL-Type, CMOS, PQCC20, PLASTIC, LCC-20	EE PLD, 15ns, PAL-Type, CMOS, PQCC20, PLASTIC, LCC-20	EE PLD, 25ns, PAL-Type, CMOS, PDIP20, PLASTIC, DIP-20	EE PLD, 25ns, PAL-Type, CMOS, PDIP20, PLASTIC, DIP-20	EE PLD, 15ns, PAL-Type, CMOS, PDIP20, PLASTIC, DIP-20	EE PLD, 25ns, PAL-Type, CMOS, PQCC20, PLASTIC, LCC-20
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	QLCC	DIP	QLCC	QLCC	DIP	DIP	DIP	QLCC
package instruction	QCCJ, LDCC20,.4SQ	DIP, DIP20,.3	QCCJ, LDCC20,.4SQ	QCCJ, LDCC20,.4SQ	DIP, DIP20,.3	DIP, DIP20,.3	DIP, DIP20,.3	QCCJ, LDCC20,.4SQ
Contacts	20	20	20	20	20	20	20	20
Reach Compliance Code	unknown	unknown	unknown	unknow	unknow	unknow	unknow	unknow
Other features	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK
Architecture	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE
maximum clock frequency	50 MHz	50 MHz	33.3 MHz	50 MHz	33.3 MHz	33.3 MHz	50 MHz	33.3 MHz
JESD-30 code	S-PQCC-J20	R-PDIP-T20	S-PQCC-J20	S-PQCC-J20	R-PDIP-T20	R-PDIP-T20	R-PDIP-T20	S-PQCC-J20
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0
length	8.9662 mm	26.035 mm	8.9662 mm	8.9662 mm	26.035 mm	26.035 mm	26.035 mm	8.9662 mm
Dedicated input times	8	8	8	8	8	8	8	8
Number of I/O lines	8	8	8	8	8	8	8	8
Number of entries	18	18	18	18	18	18	18	18
Output times	8	8	8	8	8	8	8	8
Number of product terms	64	64	64	64	64	64	64	64
Number of terminals	20	20	20	20	20	20	20	20
Maximum operating temperature	75 °C	75 °C	75 °C	85 °C	75 °C	85 °C	85 °C	85 °C
organize	8 DEDICATED INPUTS, 8 I/O	8 DEDICATED INPUTS, 8 I/O	8 DEDICATED INPUTS, 8 I/O	8 DEDICATED INPUTS, 8 I/O	8 DEDICATED INPUTS, 8 I/O	8 DEDICATED INPUTS, 8 I/O	8 DEDICATED INPUTS, 8 I/O	8 DEDICATED INPUTS, 8 I/O
Output function	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	DIP	QCCJ	QCCJ	DIP	DIP	DIP	QCCJ
Encapsulate equivalent code	LDCC20,.4SQ	DIP20,.3	LDCC20,.4SQ	LDCC20,.4SQ	DIP20,.3	DIP20,.3	DIP20,.3	LDCC20,.4SQ
Package shape	SQUARE	RECTANGULAR	SQUARE	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR	SQUARE
Package form	CHIP CARRIER	IN-LINE	CHIP CARRIER	CHIP CARRIER	IN-LINE	IN-LINE	IN-LINE	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Programmable logic type	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD
propagation delay	15 ns	15 ns	25 ns	15 ns	25 ns	25 ns	15 ns	25 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.57 mm	5.08 mm	4.57 mm	4.57 mm	5.08 mm	5.08 mm	5.08 mm	4.57 mm
Maximum supply voltage	5.25 V	5.25 V	5.25 V	5.5 V	5.25 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.75 V	4.75 V	4.75 V	4.5 V	4.75 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	NO	YES	YES	NO	NO	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	INDUSTRIAL	COMMERCIAL EXTENDED	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	J BEND	THROUGH-HOLE	J BEND	J BEND	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	J BEND
Terminal pitch	1.27 mm	2.54 mm	1.27 mm	1.27 mm	2.54 mm	2.54 mm	2.54 mm	1.27 mm
Terminal location	QUAD	DUAL	QUAD	QUAD	DUAL	DUAL	DUAL	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	8.9662 mm	7.62 mm	8.9662 mm	8.9662 mm	7.62 mm	7.62 mm	7.62 mm	8.9662 mm
Maker	-	-	AMD	AMD	AMD	AMD	AMD	AMD

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