ZPSD502B1-12LI datasheet, PDF - EEWORLD Datasheet

ZPSD502B1-12LI: DescriptionMultifunction Peripheral, CMOS, CQCC68,; CategoryThe embedded processor and controller Microcontrollers and processors; File Size7MB，141 Pages; ManufacturerWaferscale Integration Inc.

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ZPSD502B1-12LI Overview

Multifunction Peripheral, CMOS, CQCC68,

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Reach Compliance Code	unknown
Maximum access time	1.2e-7 ns
Other features	32K X 16 REPROGRAMMABLE EPROM; GENERAL PURPOSE ZPLD, DECODING ZPLD & PERIPHERAL ZPLD
Address bus width	16
boundary scan	NO
Bus compatibility	8031; 80196; 80196SP; 80186; 68HC11; 68HC16; 68330; 68331; 68340; 68302; 16000; Z80; Z8
maximum clock frequency	35.71 MHz
External data bus width	16
JESD-30 code	S-GQCC-J68
JESD-609 code	e0
Number of I/O lines	40
Number of serial I/Os
Number of terminals	68
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ
Package shape	SQUARE
Package form	CHIP CARRIER
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	1000
ROM size (bits)	512 Bits
Maximum standby current	0.00002 A
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
UV erasable	Y
Base Number Matches	1

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Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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