OXCFU950-QFAG datasheet, PDF - EEWORLD Datasheet

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OXCFU950-QFAG: DescriptionMicro Peripheral IC,; CategoryThe embedded processor and controller Microcontrollers and processors; File Size451KB，74 Pages; ManufacturerPLX Technology, Inc. (Broadcom )

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OXCFU950

DATA SHEET

EATURES

•

USB/UART multi-function 16-bit PC Card device

Host interface

•

16-bit PC Card (PCMCIA revision 8.0) compliant

•

CompactFlash/CF+ (revision 3.0) compliant

USB host controller

•

Supports USB 2.0/1.1 full-speed compliant (12

Mbps) & low speed (1.5 Mbps) devices

•

8-Kbyte data buffer

•

Integrated OHCI-like controller supported by

Oxford Semiconductor drivers

•

Supports control, bulk, interrupt & isochronous

transfers

•

Supports USB PORT_OVER_CURRENT &

PORT_POWER signals via MIO pins

Integrated USB PHY transceivers

Flexible OX16C95x-based UART

•

Supports 450 up to 950 (fully programmable)

•

Baud rates up to 12 Mbps

•

128-byte deep transmit/receive FIFO

•

Software-compatible with standard 16C550

•

Readable FIFO levels

•

9-bit data framing as well as 5,6,7 & 8

•

Detection of bad data in the receiver FIFO

Optional wakeup from low-power mode

Automated in-band flow control using

programmable Xon/Xoff characters

•

Automated hardware flow control using

CTS#/RTS# & DSR#/DTR#

•

Integral support for 4-byte I/O access for

enhanced host-side data throughput

8-Kbitx8 EEPROM for CIS & default configuration.

Programmable using Oxford Semiconductor utilities

Power management for low-power operation

•

USB suspend & resume

•

UART sleep mode

Single 12-MHz crystal oscillator for low power

4 multi-purpose I/O pins configurable as interrupts

UART & MIO pins have variable I/O voltage levels

from 1.8 V to 3.3 V nominal

PC Card/CF+ I/Os are all 3.3 V with 5-V tolerance

Single supply voltage range 2.85 V to 3.6 V

Internal regulation for 1.8 V

Supply current

•

Less than 4 mA idle

•

Less than 13 mA active

Industrial temperature range –40°C to +85°C

64-pin QFN (9 mm x 9 mm) package

•

ESCRIPTION

The OXCFU950 is a low-cost, synchronous 16-bit PC Card

(PCMCIA) or CompactFlash/CF+ to UART and USB host

controller. It combines the high performance of Oxford

Semiconductor OX16C95x UART technology with USB

host capabilities. The inclusion of both a UART and USB

make the OXCFU950 ideal for wireless data cards.

The OXCFU950 integrates an OHCI-based USB host

controller, which supports a single USB port via the

integrated transceiver. An 8-Kbyte memory provides an

efficient interface for buffer and control structures between

the USB controller and the device driver.

The attribute memory, UART and USB registers can be

programmed via the internal EEPROM during power up or

hard/soft reset, allowing different card manufacturers to

customize information contained in the attribute memory or

UART/USB registers, for example PC Card ID value.

The 3.3-V technology has been specified to operate as low

as 2.85 V to allow an in-line regulator to be used for mixed

3-V/5-V applications. CF/PC Card pins are 5-V tolerant and

the variable I/O voltage to the UART/MIO pins eases the

connection to application chipsets.

A number of power-down modes are included to minimize

power consumption, including sleep modes for when a

device function is not being used.

The OXCFU950 contains a single-channel ultra-high

performance OX16C95x UART offering data rates up to

12 Mbps and 128-byte deep transmitter and receiver

FIFOs. Deep FIFOs reduce CPU overhead and allow

utilization of higher data rates.

The OXCFU950 USB controller supports OHCI-compliant

host stack software (available from Oxford Semiconductor).

The OXCFU950 UART is software-compatible with the

widely-used industry-standard 16C550 type devices and

compatibles, as well as other OX16C95x family devices.

Oxford Semiconductor

1900 McCarthy Boulevard, Suite 210

Milpitas, CA 95035

USA

External—Free Release

Oxford Semiconductor, Inc. 2007

OXCFU950 DS-0023—February 07

Part Nos. OXCFU950-QFAG

OXFORD SEMICONDUCTOR, INC.

OXCFU950 DATA SHEET

ONTENTS

FEATURES ................................................................................................................................................... 1

DESCRIPTION .............................................................................................................................................. 1

CONTENTS................................................................................................................................................... 3

REVISION HISTORY..................................................................................................................................... 5

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

BLOCK DIAGRAM ................................................................................................................................ 7

FUNCTIONAL OVERVIEW.................................................................................................................... 8

INTRODUCTION ................................................................................................................................................................. 8

ATTRIBUTE MEMORY ....................................................................................................................................................... 8

COMMON MEMORY........................................................................................................................................................... 8

I/O SPACE........................................................................................................................................................................... 8

USB HOST CONTROLLER ................................................................................................................................................ 8

UART INTERFACE ............................................................................................................................................................. 9

EEPROM ............................................................................................................................................................................. 9

SOFTWARE DRIVERS ....................................................................................................................................................... 9

4.1

4.1.1

4.1.2

4.2

4.3

5.1

5.1.1

5.1.2

5.2

PIN INFORMATION ............................................................................................................................. 10

PIN DESCRIPTIONS............................................................................................................................ 11

POWER SUPPLY FILTERING.......................................................................................................................................... 13

PLL SUPPLY DE-COUPLING....................................................................................................................................... 13

INTERNAL VOLTAGE REGULATOR SUPPLY DE-COUPLING .................................................................................. 14

OSCILLATOR SPECIFICATION....................................................................................................................................... 14

I/O PINS FOR EEPROM DIRECT ACCESS PROGRAMMING MODE ............................................................................ 14

MODE SELECTION .......................................................................................................................................................... 15

NORMAL MODE ........................................................................................................................................................... 15

GENERIC MODE .......................................................................................................................................................... 15

16-BIT PC CARD & COMPACTFLASH/CF+ OPERATION ............................................................................................. 15

CONFIGURATION & OPERATION ..................................................................................................... 15

6.1

6.2

6.3

6.3.1

6.4

6.5

6.6

6.6.1

6.6.2

6.6.3

6.6.4

6.6.5

6.6.6

6.6.7

6.7

6.7.1

6.7.2

6.7.3

6.7.4

PC CARD & COMPACTFLASH/CF+ TARGET CONTROLLER ......................................................... 16

OPERATION ..................................................................................................................................................................... 16

OXCFU950 MEMORY SPACE MAP................................................................................................................................. 16

FUNCTION ACCESS ........................................................................................................................................................ 17

I/O ACCESS WINDOWS............................................................................................................................................... 17

I/O SPACE REGISTER MAP ............................................................................................................................................ 17

I/O SPACE REGISTERS................................................................................................................................................... 18

PC CARD/COMPACTFLASH INTERRUPT...................................................................................................................... 21

INTERRUPT GENERATION ......................................................................................................................................... 21

INTERRUPT SOURCES ............................................................................................................................................... 21

MIO INTERRUPTS........................................................................................................................................................ 22

UART INTERRUPTS..................................................................................................................................................... 22

USB INTERRUPTS ....................................................................................................................................................... 22

UART/USB TEST INTERRUPTS ................................................................................................................................. 22

CONFIGURATION & STATUS REGISTER INTERRUPT REQUEST/ACKNOWLEDGE............................................. 22

PC CARD/COMPACTFLASH FUNCTION CONFIGURATION REGISTERS................................................................... 23

CONFIGURATION OPTIONS REGISTER—COR (OFFSET 0X00) ............................................................................. 23

CONFIGURATION STATUS REGISTER—CSR (OFFSET 0X02) ............................................................................... 24

PIN REPLACEMENT REGISTER—PRR (OFFSET 0X04)........................................................................................... 25

SOCKET & COPY REGISTER—SCR (OFFSET 0X06) ............................................................................................... 25

External—Free Release

DS-0023 February 2007

Page 3 of 74

OXFORD SEMICONDUCTOR, INC.

6.7.5

6.8

6.8.1

6.8.2

6.8.3

6.8.4

OXCFU950 DATA SHEET

I/O BASE ADDRESS REGISTER—IOBA (OFFSET 0X0A & 0X0C) ............................................................................ 26

CARD INFORMATION STRUCTURE............................................................................................................................... 26

FIXED DEFAULT CIS IMAGE....................................................................................................................................... 26

STANDARD PRE-PROGRAMMED CIS IMAGE........................................................................................................... 29

EXAMPLE USB SINGLE FUNCTION CIS IMAGE........................................................................................................ 31

EXAMPLE UART SINGLE FUNCTION CIS IMAGE ..................................................................................................... 33

7.1

7.2

7.3

7.4

7.5

7.6

USB HOST CONTROLLER ................................................................................................................. 35

WRITING TO AN OHCI REGISTER IN THE EMBEDDED USB HOST CONTROLLER.................................................. 37

READING FROM AN OHCI REGISTER IN THE EMBEDDED USB HOST CONTROLLER ........................................... 37

WRITING TO THE USB MEMORY ................................................................................................................................... 37

READING FROM USB MEMORY..................................................................................................................................... 38

ACCESSING USB MEMORY VIA COMMON MEMORY ACCESS.................................................................................. 38

USB HOST CONTROLLER OVERVIEW.......................................................................................................................... 38

UART INTERFACE.............................................................................................................................. 39

MODE SELECTION .......................................................................................................................................................... 39

450 MODE..................................................................................................................................................................... 39

550 MODE..................................................................................................................................................................... 39

750 MODE..................................................................................................................................................................... 39

650 MODE..................................................................................................................................................................... 39

950 MODE..................................................................................................................................................................... 40

REGISTER DESCRIPTION TABLES ............................................................................................................................... 41

RESET CONFIGURATION ............................................................................................................................................... 45

HOST RESET ............................................................................................................................................................... 45

SOFTWARE RESET ..................................................................................................................................................... 45

TRANSMITTER & RECEIVER FIFOS .............................................................................................................................. 45

4-BYTE ACCESS TO THR & RHR ............................................................................................................................... 45

FIFO CONTROL REGISTER—FICR ............................................................................................................................ 46

LINE CONTROL & STATUS............................................................................................................................................. 47

FALSE START BIT DETECTION.................................................................................................................................. 47

LINE CONTROL REGISTER—LCR.............................................................................................................................. 47

LINE STATUS REGISTER—LSR ................................................................................................................................. 48

UART INTERRUPTS......................................................................................................................................................... 49

INTERRUPT ENABLE REGISTER—IER...................................................................................................................... 49

INTERRUPT STATUS REGISTER—ISR...................................................................................................................... 50

INTERRUPT DESCRIPTION ........................................................................................................................................ 50

UART POWER SAVING ............................................................................................................................................... 51

MODEM INTERFACE ....................................................................................................................................................... 51

MODEM CONTROL REGISTER—MCR....................................................................................................................... 51

MODEM STATUS REGISTER—MSR .......................................................................................................................... 52

OTHER STANDARD REGISTERS ................................................................................................................................... 52

DIVISOR LATCH REGISTERS—DLL & DLM............................................................................................................... 52

SCRATCH PAD REGISTER—SPR .............................................................................................................................. 52

AUTOMATIC FLOW CONTROL....................................................................................................................................... 53

ENHANCED FEATURES REGISTER—EFR................................................................................................................ 53

SPECIAL CHARACTER DETECTION .......................................................................................................................... 54

AUTOMATIC IN-BAND FLOW CONTROL ................................................................................................................... 54

AUTOMATIC OUT-OF-BAND FLOW CONTROL ......................................................................................................... 54

BAUD RATE GENERATION............................................................................................................................................. 55

GENERAL OPERATION ............................................................................................................................................... 55

CLOCK PRESCALER REGISTER—CPR..................................................................................................................... 55

TIMES CLOCK REGISTER—TCR................................................................................................................................ 55

ALTERNATIVE BAUD RATE CONTROL REGISTERS................................................................................................ 56

ADDITIONAL FEATURES ................................................................................................................................................ 57

ADDITIONAL STATUS REGISTER—ASR ................................................................................................................... 57

FIFO FILL LEVELS—TFL & RFL .................................................................................................................................. 57

External—Free Release

Page 4 of 74

8.1

8.1.1

8.1.2

8.1.3

8.1.4

8.1.5

8.2

8.3

8.3.1

8.3.2

8.4

8.4.1

8.4.2

8.5

8.5.1

8.5.2

8.5.3

8.6

8.6.1

8.6.2

8.6.3

8.6.4

8.7

8.7.1

8.7.2

8.8

8.8.1

8.8.2

8.9

8.9.1

8.9.2

8.9.3

8.9.4

8.10

8.10.1

8.10.2

8.10.3

8.10.4

8.11

8.11.1

8.11.2

DS-0023 February 2007

OXFORD SEMICONDUCTOR, INC.

8.11.3

8.11.4

8.11.5

8.11.6

8.11.7

8.11.8

8.11.9

8.11.10

8.11.11

8.11.12

8.11.13

8.11.14

A_TCR

8.11.15

OXCFU950 DATA SHEET

ADDITIONAL CONTROL REGISTER—ACR................................................................................................................ 57

TRANSMITTER TRIGGER LEVEL—TTL ..................................................................................................................... 58

RECEIVER INTERRUPT. TRIGGER LEVEL—RTL ..................................................................................................... 59

FLOW CONTROL LEVELS—FCL & FCH..................................................................................................................... 59

DEVICE IDENTIFICATION REGISTERS...................................................................................................................... 59

NINE-BIT MODE REGISTER—NMR ............................................................................................................................ 59

MODEM DISABLE MASK—MDM ................................................................................................................................. 60

READABLE FICR—RFC............................................................................................................................................... 60

GOOD-DATA STATUS REGISTER—GDS................................................................................................................... 61

DMA STATUS REGISTER—DMS ................................................................................................................................ 61

PORT INDEX REGISTER—PIX.................................................................................................................................... 61

ALTERNATIVE UART BAUD RATE CONTROL REGISTERS: A_LATCH, A_ENABLE, A_DLL, A_DLM, A_CPR,

ALTERNATIVE 32-BIT FIFO ACCESS ENABLE:

DBURST

..................................................................................... 61

10.1

10.2

10.3

10.4

MULTI PURPOSE I/O (MIO) AND USB POWER MANAGEMENT MODULE ..................................... 62

INTERNAL EEPROM SPECIFICATION........................................................................................... 62

ZONE 0 : ZONE HEADER ................................................................................................................................................ 63

ZONE 1 : CIS CONFIGURATION ZONE .......................................................................................................................... 63

ZONE 2 : USB FUNCTION ACCESS ZONE. ................................................................................................................... 64

ZONE 3 : UART FUNCTION ACCESS ............................................................................................................................. 64

13.1

14.1

14.2

INTRODUCTION TO THE OXCFU950 SOFTWARE DRIVERS....................................................... 65

OPERATING CONDITIONS ............................................................................................................. 66

DC ELECTRICAL CHARACTERISTICS.......................................................................................... 67

TIMING WAVEFORMS / AC CHARACTERISTICS ......................................................................... 68

MEMORY ACCESS........................................................................................................................................................... 68

I/O ACCESS ...................................................................................................................................................................... 69

2.85 V TO 3.6 V OPERATION........................................................................................................................................... 67

15.1

PACKAGE INFORMATION.............................................................................................................. 71

PACKAGE DIMENSIONS ................................................................................................................................................. 72

ORDERING INFORMATION ............................................................................................................ 72

NOTES ........................................................................................................................................................ 73

CONTACT DETAILS................................................................................................................................... 74

DISCLAIMER .............................................................................................................................................. 74

EVISION

ISTORY

REV

Dec 2005

May 2006

Feb 2007

DATE

7 Dec 2005

5 May 2006

REASON FOR CHANGE / SUMMARY OF CHANGE

First publication

Features revision

Updates to reset values for UART Interrupt Enable register (address of 0x15) & Soft Reset and

Clock Enable register (address of 0x18); reset text correction for ICR REV register; clarification

of use of theOXCFU950 with USB hub devices

DS-0023 February 2007

External—Free Release

Page 5 of 74

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