74LV30D-T datasheet, PDF - EEWORLD Datasheet

74LV30D-T: DescriptionIC LV/LV-A/LVX/H SERIES, 8-INPUT NAND GATE, PDSO14, Gate; Categorylogic logic; File Size190KB，12 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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74LV30D-T Overview

IC LV/LV-A/LVX/H SERIES, 8-INPUT NAND GATE, PDSO14, Gate

Parameter Name	Attribute value
package instruction	SOP,
Reach Compliance Code	unknown
series	LV/LV-A/LVX/H
JESD-30 code	R-PDSO-G14
length	8.65 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	NAND GATE
Number of functions	1
Number of entries	8
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
propagation delay (tpd)	16 ns
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
width	3.9 mm
Base Number Matches	1

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