PD - 97312B
Applications
l
High Efficiency Synchronous Rectification in
SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
G
IRFR3607PbF
IRFU3607PbF
HEXFET
®
Power MOSFET
D
Benefits
l
Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l
Fully Characterized Capacitance and
Avalanche SOA
l
Enhanced body diode dV/dt and dI/dt
Capability
S
V
DSS
R
DS(on)
typ.
max.
I
D (Silicon Limited)
I
D (Package Limited)
D
75V
7.34mΩ
9.0mΩ
80A
56A
c
S
G
S
D
G
D-Pak
I-Pak
IRFR3607PbF IRFU3607PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
80
56
56
310
140
Units
A
d
W
W/°C
V
V/ns
°C
f
0.96
± 20
27
-55 to + 175
300
(1.6mm from case)
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Ãd
e
g
Typ.
120
46
14
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θJA
R
θJA
Junction-to-Case
Junction-to-Ambient (PCB Mount)
Junction-to-Ambient
k
Parameter
Max.
1.045
50
110
Units
°C/W
j
–––
–––
–––
www.irf.com
1
04/30/2010
IRFR/U3607PbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
75
–––
–––
2.0
–––
–––
–––
–––
––– –––
0.096 –––
7.34 9.0
–––
4.0
–––
20
––– 250
––– 100
––– -100
Conditions
V V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 5mA
mΩ V
GS
= 10V, I
D
= 46A
V V
DS
= V
GS
, I
D
= 100µA
µA V
DS
= 75V, V
GS
= 0V
V
DS
= 60V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
g
d
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
R
G(int)
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Internal Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Min. Typ. Max. Units
115
–––
–––
–––
–––
–––
Conditions
V
DS
= 50V, I
D
= 46A
I
D
= 46A
V
DS
= 38V
V
GS
= 10V
I
D
= 46A, V
DS
=0V, V
GS
= 10V
–––
56
13
16
40
0.55
16
110
43
96
3070
280
130
380
610
–––
84
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
g
Ω
h
j
–––
–––
–––
–––
–––
–––
–––
–––
–––
ns
pF
V
DD
= 49V
I
D
= 46A
R
G
= 6.8Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 60V
V
GS
= 0V, V
DS
= 0V to 60V
g
j
h
D
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Min. Typ. Max. Units
–––
–––
–––
–––
80
Conditions
MOSFET symbol
showing the
integral reverse
G
A
Ãd
310
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
S
p-n junction diode.
––– –––
1.3
V T
J
= 25°C, I
S
= 46A, V
GS
= 0V
V
R
= 64V,
–––
33
50
ns T
J
= 25°C
I
F
= 46A
T
J
= 125°C
–––
39
59
di/dt = 100A/µs
–––
32
48
nC T
J
= 25°C
T
J
= 125°C
–––
47
71
–––
1.9
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
g
g
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 56A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.12mH
R
G
= 25Ω, I
AS
= 46A, V
GS
=10V. Part not recommended for use
above this value.
I
SD
≤
46A, di/dt
≤
1920A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom-
mended footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
2
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IRFR/U3607PbF
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
100
10
4.5V
4.5V
≤
60µs PULSE WIDTH
Tj = 25°C
1
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
10
0.1
1
≤
60µs PULSE WIDTH
Tj = 175°C
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
Fig 2.
Typical Output Characteristics
3.0
ID = 80A
2.5
VGS = 10V
ID, Drain-to-Source Current (A)
100
10
T J = 175°C
T J = 25°C
(Normalized)
2.0
1.5
1
VDS = 25V
≤
60µs PULSE WIDTH
2
3
4
5
6
7
8
1.0
0.1
0.5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS , Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Fig 4.
Normalized On-Resistance vs. Temperature
12.0
ID= 46A
VGS , Gate-to-Source Voltage (V)
10.0
8.0
6.0
4.0
2.0
0.0
C, Capacitance (pF)
VDS= 24V
VDS= 15V
10000
Ciss
1000
Coss
Crss
100
1
10
VDS, Drain-to-Source Voltage (V)
100
0
10
20
30
40
50
60
Q G , Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFR/U3607PbF
1000
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
100µsec
1msec
ISD, Reverse Drain Current (A)
100
T J = 175°C
10
T J = 25°C
1
VGS = 0V
0.1
0.0
0.5
1.0
1.5
2.0
VSD, Source-to-Drain Voltage (V)
100
10
Tc = 25°C
Tj = 175°C
Single Pulse
1
1
10msec
DC
10
VDS, Drain-to-Source Voltage (V)
100
Fig 7.
Typical Source-Drain Diode Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
Fig 8.
Maximum Safe Operating Area
100
Id = 5mA
95
90
85
80
75
70
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
80
70
60
ID, Drain Current (A)
Limited By Package
50
40
30
20
10
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
Fig 9.
Maximum Drain Current vs. Case Temperature
1.20
EAS , Single Pulse Avalanche Energy (mJ)
Fig 10.
Drain-to-Source Breakdown Voltage
500
450
400
350
300
250
200
150
100
50
0
25
50
75
100
125
150
175
ID
TOP
5.6A
11A
BOTTOM 46A
1.00
0.80
Energy (µJ)
0.60
0.40
0.20
0.00
-10
0
10
20
30
40
50
60
70
80
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
4
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
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IRFR/U3607PbF
10.00
Thermal Response ( Z thJC ) °C/W
1.00
D = 0.50
0.20
0.10
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
τ
J
R
1
R
1
τ
J
τ
1
τ
2
R
2
R
2
R
3
R
3
τ
3
R
4
R
4
τ
C
τ
τ
4
Ri (°C/W)
0.01109
0.26925
0.49731
0.26766
0.000003
0.000130
0.001301
0.008693
τi
(sec)
τ
1
τ
2
τ
3
τ
4
0.01
Ci=
τi/Ri
Ci i/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
0.00
1E-006
1E-005
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01
10
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆
Tj = 150°C and
Tstart =25°C (Single Pulse)
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Τ
j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs.Pulsewidth
150
125
100
75
50
25
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 46A
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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EAR , Avalanche Energy (mJ)
5
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