Preliminary
EMP216MGAF Series
2Mx16 Pseudo Static RAM
Document Title
2M x 16 bit Pseudo SRAM ( EMP216MGAF Series ) Specification
Revision History
Revision No.
0.0
History
Initial Draft
Draft Date
Oct. 24 , 2005
Remark
Preliminary
4F Korea Construction Financial Cooperative B/D, 301-1 Yeon-Dong, Jeju-Si, Jeju-Do, Rep.of Korea
Tel : +82-64-740-1700 Fax : +82-64-740-1749~1750 / Homepage : www.emlsi.com
Emerging Memory & Logic Solutions Inc.
Zip Code : 690-717
The attached datasheets are provided by EMLSI reserve the right to change the specifications and products. EMLSI will answer to
your questions about device. If you have any questions, please contact the EMLSI office.
Rev 0.0
Preliminary
EMP216MGAF Series
2Mx16 Pseudo Static RAM
2Mb x16 Pseudo Static RAM Specification
GENERAL DESCRIPTION
The EMP216MGAF series is 33,554,432 bits of Pseudo SRAM which uses DRAM type memory cells, but
this device has refresh-free operation and extreme low power consumption technology. Furthermore the
interface is compatible to a low power Asynchronous type SRAM. The EMP216MGAF is organized as
2,097,152 Words x 16 bit.
FEATURES
- Organization :2M x16
- Power Supply Voltage : 2.7 ~ 3.3V
- Separated I/O power(VccQ) & Core power(Vcc)
- Three state outputs
- Byte read/write control by UB# / LB#
- Support Page Read/Write operation with 16 words
- Support Direct Deep Power Down control by ZZ# and Auto-TCSR for power saving
- Package type : 48-FPBGA 6.0x8.0
PRODUCT FAMILY
Part Number
Operating Temp.
Power Supply
Speed
(t
RC
)
Power Dissipation
(I
SB1
, Max.)
Standby
(I
CC2
, Max.)
Operating
EMP216MGAF-70E
-25
o
C to 85
o
C
2.7V to 3.3V
70ns
100uA
25mA
FUNCTION BLOCK DIAGRAM
ZZ#
CS#
UB#
LB#
WE#
OE#
Self-Refresh
CONTROL
CONTROL
LOGIC
COLUMN SELECT
ROW SELECT
A0~A20
ADDRESS
DECODER
Memory Array
2M X 16
DQ0~
DQ15
Din/Dout BUFFER
I/O CIRCUIT
¡¡¡¡
Rev 0.0
Preliminary
EMP216MGAF Series
2Mx16 Pseudo Static RAM
PIN DESCRIPTION ( 48-FBGA-6.00x8.00 )
1
A
LB#
2
OE#
3
A0
4
A1
5
A2
6
ZZ#
B
DQ8
UB#
A3
A4
CS#
DQ0
C
D
DQ9
DQ10
A5
A6
DQ1
DQ2
VSSQ
DQ11
A17
A7
DQ3
VCC
E
VCCQ
DQ12
DNU
A16
DQ4
VSS
F
DQ14
DQ13
A14
A15
DQ5
DQ6
G
H
DQ15
A19
A12
A13
WE#
DQ7
A18
A8
A9
A10
A11
A20
TOP VIEW (Ball Down)
Name
CS#
OE#
WE#
ZZ#
Function
Chip select inputs
Output enable input
Write enable input
Low Power Control
Name
LB#
UB#
VCC
VCCQ
Function
Lower byte (DQ
0~7
)
Upper byte (DQ
8~15
)
Power supply
I/O Power supply
DQ
0-15
Data In-out
A
0-20
DNU
Address inputs
Do Not Use
VSS(Q) Ground
NC
No connection
¢¢¢¢
Rev 0.0
Preliminary
EMP216MGAF Series
2Mx16 Pseudo Static RAM
ABSOLUTE MAXIMUM RATINGS
1)
Parameter
Voltage on Any Pin Relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage Temperature
Operating Temperature
Symbol
V
IN
, V
OUT
V
CC
, V
CCQ
P
D
T
STG
T
A
Ratings
-0.2 to V
CCQ
+0.3V
-0.2
2)
to 3.6V
1.0
-65 to 150
-25 to 85
Unit
V
V
W
o
C
o
C
1.
Stresses greater than those listed above “Absolute Maximum Ratings” may cause permanent damage to the device. Functional
operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2. Undershoot at power-off : -1.0V in case of pulse width < 20ns
FUNCTIONAL DESCRIPTION
CS#
H
X
X
L
L
L
L
L
L
L
L
ZZ#
H
L
H
H
H
H
H
H
H
H
H
OE#
X
X
X
H
H
L
L
L
X
X
X
WE#
X
X
X
H
H
H
H
H
L
L
L
LB#
X
X
H
L
X
L
H
L
L
H
L
UB#
X
X
H
X
L
H
L
L
H
L
L
DQ
0~7
High-Z
High-Z
High-Z
High-Z
High-Z
Data Out
High-Z
Data Out
Data In
High-Z
Data In
DQ
8~15
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Data Out
Data Out
High-Z
Data In
Data In
Mode
Deselected
Deselected
Deselected
Output Disabled
Output Disabled
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
Power
Stand by
Deep Power Down
Stand by
Active
Active
Active
Active
Active
Active
Active
Active
Note: X means don’t care. (Must be low or high state)
££££
Rev 0.0
Preliminary
EMP216MGAF Series
2Mx16 Pseudo Static RAM
RECOMMENDED DC OPERATING CONDITIONS
1)
Parameter
Supply voltage
Ground
Input high voltage
Input low voltage
1.
2.
3.
4.
Symbol
V
CC
V
CCQ
V
SS
, V
SSQ
V
IH
V
IL
Min
2.7
2.7
0
0.8 * V
CCQ
-0.2
3)
Typ
3.0
3.0
0
-
-
Max
3.3
3.3
0
V
CCQ
+ 0.2
2)
0.2 * V
CCQ
Unit
V
V
V
V
V
T
A
= -25 to 85
o
C, otherwise specified
Overshoot: V
CC
+1.0 V in case of pulse width < 20ns
Undershoot: -1.0 V in case of pulse width < 20ns
Overshoot and undershoot are sampled, not 100% tested
.
CAPACITANCE
1)
(f =1MHz, T
A
=25
o
C)
Item
Input capacitance
Input/Ouput capacitance
1. Capacitance is sampled, not 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
8
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Parameter
Input leakage current
Output leakage current
Symbol
I
LI
I
LO
I
CC1
Average operating current
I
CC2
Output low voltage
Output high voltage
V
OL
V
OH
I
SB
Test Conditions
V
IN
=V
SS
to V
CCQ
, V
CC=
V
CCmax
CS#=V
IH
, ZZ#=V
IH
, OE#=V
IH
or WE#=V
IL
,
V
IO
=V
SS
to V
CCQ
, V
CC=
V
CCmax
Cycle time=1µs, 100% duty, I
IO
=0mA,
CS#<0.2V, ZZ#=V
IH
, V
IN
<0.2V or V
IN
>V
CCQ
-0.2V
Cycle time = Min, I
IO
=0mA, 100% duty,
CS#=V
IL
, ZZ#=V
IH
, V
IN
=V
IL
or V
IH
I
OL
= 0.5mA, V
CC=
V
CCmin
I
OH
= -0.5mA, V
CC=
V
CCmin
CS#,ZZ#>V
CCQ
-0.2V, Other inputs = 0 ~ V
CCQ
(Typ. condition : V
CC
=3.0V @ 25
o
C)
(Max. condition : V
CC
=3.3V @ 85
o
C)
Min
-1
-1
-
-
-
0.8*V
CCQ
Typ
-
-
-
-
-
-
Max
1
1
3
25
0.2*V
CCQ
Unit
uA
uA
mA
mA
V
V
-
Standby Current (CMOS)
-
-
100
uA
1. Maximum Icc specifications are tested with V
CC
= V
CCmax.
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Rev 0.0
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