EH1400SJTS-18.000M
EH14 00 SJ
Series
RoHS Compliant 5.0V Plastic J-Lead SMD HCMOS/TTL
High Frequency Oscillator
Frequency Tolerance/Stability
±100ppm Maximum
Package
Operating Temperature Range
0°C to +70°C
RoHS
TS -18.000M
Nominal Frequency
18.000MHz
Pin 1 Connection
Tri-State (Disabled Output: High Impedance)
Duty Cycle
50 ±10(%)
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
18.000MHz
±100ppm Maximum (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range, Supply Voltage Change, Output Load Change, 1st Year Aging at 25°C,
Shock, and Vibration)
±5ppm/year Maximum
0°C to +70°C
5.0Vdc ±10%
50mA Maximum (No Load)
2.4Vdc Minimum with TTL Load, Vdd-0.4Vdc Minimum with HCMOS Load, IOH = -16mA
0.4Vdc Maximum with TTL Load, 0.5Vdc Maximum with HCMOS Load, IOL = +16mA
6nSec Maximum (Measured at 0.8Vdc to 2.0Vdc with TTL Load; Measured at 20% to 80% of waveform
with HCMOS Load)
50 ±10(%) (Measured at 1.4Vdc with TTL Load or at 50% of waveform with HCMOS Load)
10TTL Load or 50pF HCMOS Load Maximum
CMOS
Tri-State (Disabled Output: High Impedance)
+2.2Vdc Minimum to enable output, +0.8Vdc Maximum to disable output (High Impedance), No Connect to
enable output.
±250pSec Maximum, ±100pSec Typical
±50pSec Maximum, ±30pSec Typical
10mSec Maximum
-55°C to +125°C
Aging at 25°C
Operating Temperature Range
Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Pin 1 Connection
Tri-State Input Voltage (Vih and Vil)
Absolute Clock Jitter
One Sigma Clock Period Jitter
Start Up Time
Storage Temperature Range
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
Fine Leak Test
Gross Leak Test
Mechanical Shock
Resistance to Soldering Heat
Resistance to Solvents
Solderability
Temperature Cycling
Vibration
MIL-STD-883, Method 1014, Condition A
MIL-STD-883, Method 1014, Condition C
MIL-STD-202, Method 213, Condition C
MIL-STD-202, Method 210
MIL-STD-202, Method 215
MIL-STD-883, Method 2003
MIL-STD-883, Method 1010
MIL-STD-883, Method 2007, Condition A
www.ecliptek.com | Specification Subject to Change Without Notice | Rev D 2/17/2010 | Page 1 of 5
EH1400SJTS-18.000M
MECHANICAL DIMENSIONS (all dimensions in millimeters)
PIN
5.080
±0.203
1
0.25 MIN
2
4
7.620
±0.203
9.8
MAX
3
3
4
MARKING
ORIENTATION
1
2
14.0
MAX
CONNECTION
Tri-State (High
Impedance)
Ground
Output
Supply Voltage
LINE MARKING
1
ECLIPTEK
18.000M
PXXYZZ
P=Configuration Designator
XX=Ecliptek Manufacturing
Code
Y=Last Digit of the Year
ZZ=Week of the Year
2
3
0.510 ±0.203
4.7
MAX
Suggested Solder Pad Layout
All Dimensions in Millimeters
1.27 (X4)
3.0 (X4)
5.8
Solder Land
(X4)
3.81
All Tolerances are ±0.1
www.ecliptek.com | Specification Subject to Change Without Notice | Rev D 2/17/2010 | Page 2 of 5
EH1400SJTS-18.000M
OUTPUT WAVEFORM & TIMING DIAGRAM
TRI-STATE INPUT
V
IH
V
IL
CLOCK OUTPUT
V
OH
80% or 2.0V
DC
50% or 1.4V
DC
20% or 0.8V
DC
V
OL
OUTPUT DISABLE
(HIGH IMPEDANCE
STATE)
t
PLZ
Fall
Time
Rise
Time
T
W
T
Duty Cycle (%) = T
W
/T x 100
t
PZL
Test Circuit for TTL Output
Output Load
Drive Capability
10TTL
5TTL
2TTL
10LSTTL
1TTL
R
L
Value
(Ohms)
390
780
1100
2000
2200
C
L
Value
(pF)
15
15
6
15
3
Oscilloscope
Frequency
Counter
Table 1: R
L
Resistance Value and C
L
Capacitance
Value Vs. Output Load Drive Capability
Supply
Voltage
(V
DD
)
Probe
(Note 2)
Output
R
L
(Note 4)
+
+
Power
Supply
_
+
Voltage
Meter
_
Current
Meter
_
+
0.01µF
(Note 1)
0.1µF
(Note 1)
C
L
(Note 3)
Power
Supply
_
Ground
No Connect
or Tri-State
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a 0.01µF high frequency
ceramic bypass capacitor close to the package ground and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth
(>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
Note 4: Resistance value R
L
is shown in Table 1. See applicable specification sheet for 'Load Drive Capability'.
Note 5: All diodes are MMBD7000, MMBD914, or equivalent.
www.ecliptek.com | Specification Subject to Change Without Notice | Rev D 2/17/2010 | Page 3 of 5
EH1400SJTS-18.000M
Test Circuit for CMOS Output
Oscilloscope
Frequency
Counter
+
+
Power
Supply
_
+
Voltage
Meter
_
Current
Meter
_
Supply
Voltage
(V
DD
)
Probe
(Note 2)
Output
0.01µF
(Note 1)
0.1µF
(Note 1)
Ground
C
L
(Note 3)
No Connect
or Tri-State
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a 0.01µF high frequency
ceramic bypass capacitor close to the package ground and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth
(>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
www.ecliptek.com | Specification Subject to Change Without Notice | Rev D 2/17/2010 | Page 4 of 5
EH1400SJTS-18.000M
Recommended Solder Reflow Methods
T
P
Critical Zone
T
L
to T
P
Ramp-up
Ramp-down
Temperature (T)
T
L
T
S
Max
T
S
Min
t
S
Preheat
t 25°C to Peak
t
L
t
P
Time (t)
Low Temperature Infrared/Convection 240°C
T
S
MAX to T
L
(Ramp-up Rate)
Preheat
- Temperature Minimum (T
S
MIN)
- Temperature Typical (T
S
TYP)
- Temperature Maximum (T
S
MAX)
- Time (t
S
MIN)
Ramp-up Rate (T
L
to T
P
)
Time Maintained Above:
- Temperature (T
L
)
- Time (t
L
)
Peak Temperature (T
P
)
Target Peak Temperature (T
P
Target)
Time within 5°C of actual peak (t
p
)
Ramp-down Rate
Time 25°C to Peak Temperature (t)
Moisture Sensitivity Level
5°C/second Maximum
N/A
150°C
N/A
60 - 120 Seconds
5°C/second Maximum
150°C
200 Seconds Maximum
240°C Maximum
240°C Maximum 1 Time / 230°C Maximum 2 Times
10 seconds Maximum 2 Times / 80 seconds Maximum 1 Time
5°C/second Maximum
N/A
Level 1
Low Temperature Manual Soldering
185°C Maximum for 10 seconds Maximum, 2 times Maximum.
High Temperature Manual Soldering
260°C Maximum for 5 seconds Maximum, 2 times Maximum.
www.ecliptek.com | Specification Subject to Change Without Notice | Rev D 2/17/2010 | Page 5 of 5
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