TDA7439
Three-band digitally-controlled audio processor
Features
!
Input multiplexer
– four stereo inputs
– selectable input gain for optimal adaptation
to different sources
Single stereo output
Treble, mid-range and bass control in 2-dB
steps
Volume control in 1-dB steps
Two speaker attenuators:
– two independent speaker controls in 1-dB
steps for balance facility
– independent mute function
All functions are programmable via serial bus.
!
!
!
!
high-quality audio applications in car-radio and
Hi-Fi systems. Selectable input gain is provided.
All the functions are controlled by serial bus.
The AC signal setting is obtained by resistor
networks and switches combined with operational
amplifiers.
!
Description
The TDA7439 is a volume, tone (bass, mid-range
and treble) and balance (left/right) processor for
Table 1. Device summary
Order code
TDA7439
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The TDA7439 employs BIPOLAR/CMOS
technology to provide low distortion, low noise
and DC stepping.
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Package
SDIP30
Tube
Packaging
March 2008
Rev 11
1/23
www.st.com
23
Contents
TDA7439
Contents
1
2
3
Block diagram and pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Application suggestions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
Tone control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1.1
3.1.2
Bass, mid-range stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Treble stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2
3.3
Pin CREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4
I
2
C
4.1
4.2
4.3
4.4
4.5
4.6
bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Transmission without acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
I
2
C bus transmission examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.1
No address incrementing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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9
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Address incrementing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
I
2
C bus addresses and data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.1
6.2
6.3
Chip address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Sub-address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Chip input/output circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2/23
TDA7439
Block diagram and pin out
1
Block diagram and pin out
Figure 1.
Block diagram
MUXOUTL
L-IN1
11
100K
12
100K
13
100K
14
100K
0/30dB
2dB STEP
100K
9
100K
8
100K
7
100K
INPUT MULTIPLEXER
+ GAIN
17
MUXOUTR
INR
18
I CBUS DECODER + LATCHES
2
INL
16
TREBLE(L)
27
MIN(L) MOUT(L) BIN(L)
26
R
M
25
23
R
B
BOUT(L)
24
15
L-IN2
L-IN3
G
VOLUME
TREBLE
MIDDLE
BASS
SPKR ATT
LEFT
6
LOUT
L-IN4
R-IN1
10
R-IN2
G
VOLUME
TREBLE
MIDDLE
BASS
R-IN3
R-IN4
Figure 2.
Pin connections
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SDA
CREF
V
S
AGND
ROUT
LOUT
R-IN4
R-IN3
R-IN2
R-IN1
L-IN1
L-IN2
L-IN3
L-IN4
O
-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
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TREBLE(R)
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R
M
19
20
r
P
R
B
21
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V
REF
22
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29
5
3
4
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SCL
SDA
DIG_GND
ROUT
V
S
AGND
SPKR ATT
RIGHT
SUPPLY
MIN(R) MOUT(R) BIN(R)
BOUT(R) CREF
D95AU342B
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
D95AU340A
SCL
DIG_GND
TREBLE(R)
TREBLE(L)
MIN(L)
MOUT(L)
BOUT(L)
BIN(L)
BOUT(R)
BIN(R)
MOUT(R)
MIN(R)
INR
MUXOUTR
INL
MUXOUTL
3/23
Electrical specifications
TDA7439
2
Electrical specifications
Table 2.
Symbol
V
S
T
amb
T
stg
Absolute maximum ratings
Parameter
Operating supply voltage
Operating ambient temperature
Storage temperature range
Value
10.5
0 to 70
-55 to 150
Unit
V
°C
°C
Table 3.
Symbol
R
th j-pin
Thermal data
Parameter
Thermal resistance junction-pins
Value
Table 4.
Symbol
V
S
V
CL
THD
S/N
S
C
Quick reference data
Parameter
Supply voltage
Max. input signal handling
Total harmonic distortion V = 1 V RMS, f = 1 kHz
Signal to noise ratio V
out
= 1 V RMS (mode = OFF)
Channel separation f = 1 kHz
Input gain (in 2-dB steps)
Volume control (in 1-dB steps)
Treble control (in 2-dB steps)
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Middle control (in 2-dB steps)
Bass control (in 2-dB steps)
Balance control (in 1-dB steps)
Mute attenuation
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Min
6
2
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Typ
9
0.01
106
90
85
s)
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Unit
°C/W
Max
Unit
V
V
RMS
10.2
0.1
%
dB
dB
0
-47
-14
-14
-14
-79
100
30
0
+14
+14
+14
0
dB
dB
dB
dB
dB
dB
dB
Table 5.
shows the electrical characteristics. Refer to the test circuit in
Figure 3,
T
amb
=
25° C, V
S
= 9 V, R
L
= 10 kΩ, generator resistance R
g
= 600
Ω,
all controls flat (G = 0 dB),
unless otherwise specified.
Table 5.
Symbol
Supply
V
S
I
S
SVR
Supply voltage
Supply current
Ripple rejection
6
4
60
9
7
90
10.2
10
V
mA
dB
Electrical characteristics
Parameter
Test condition
Min
Typ
Max
Unit
4/23
TDA7439
Table 5.
Symbol
Input stage
R
IN
V
CL
Input resistance
Clipping level
THD = 0.3%
The selected input is
grounded through a 2.2 µF
capacitor
Electrical specifications
Electrical characteristics (continued)
Parameter
Test condition
Min
Typ
Max
Unit
70
2
100
2.5
130
kΩ
V
RMS
dB
S
IN
G
in_min
Input separation
Minimum input gain
80
-1
29
1.5
100
0
30
2
1
31
dB
dB
G
in_max
Maximum input gain
G
step
Step resolution
Volume control
R
i
C
range
A
v_max
A
step
E
A
Volume control input resistance
Volume control range
Max. attenuation
Step resolution
Attenuation set error
EΤ
Tracking error
V
DC
A
mute
DC step
Bass control
(1)
O
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B
step
R
B
ro
P
e
Gb
Gt
Mute attenuation
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(s
t
b
O
A
V
= 0 to -24 dB
A
V
= -24 to -47 dB
A
V
= 0 to -24 dB
A
V
= -24 to -47 dB
adjacent attenuation steps
from 0 dB to A
v_max
so
te
le
r
P
20
45
d
o
33
ct
u
1
0
0
0
0
2.5
s)
(
dB
50
49
49
kΩ
dB
dB
dB
dB
dB
dB
dB
mV
mV
dB
47
47
45
0.5
-1.0
-1.5
1.5
1.0
1.5
1
2
3
0
0.5
80
100
Control range
Step resolution
Internal feedback resistance
Max. boost/cut
±12.0 ±14.0 ±16.0
1
33
2
44
3
55
dB
dB
kΩ
Treble control
(1)
Control range
Step resolution
Max. boost/cut
±13.0 ±14.0 ±15.0
1
2
3
dB
dB
T
step
Mid-range control
(1)
Gm
M
step
R
M
Control range
Step resolution
Internal feedback resistance
Max. boost/cut
±12.0 ±14.0 ±16.0
1
18.75
2
25
3
31.25
dB
dB
kΩ
5/23
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