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FSA2467
—
0.4Ω Low-Voltage Dual DPDT Analog Switch
April 2008
FSA2467
0.4Ω Low-Voltage Dual DPDT Analog Switch
Features
Typical 0.4Ω On Resistance (R
ON
) for +2.7V supply
Features Less then12µA I
CCT
Current when Sn
Input is Lower than V
CC
0.25Ω Maximum R
ON
Flatness for +2.7V Supply
3x3mm 16-Lead Pb-Free MLP Package
1.8x2.6mm 16-Lead Pb-Free UMLP Package
Broad V
CC
Operating Range
Low THD (0.02% Typical for 32Ω Load)
Description
The FSA2467 is a dual Double-Pole, Double-Throw
(DPDT) analog switch. The FSA2467 operates from a
single 1.65V to 4.3V supply. The FSA2467 features an
ultra-low on resistance of 0.4Ω at a +2.7V supply and
25°C. This device is fabricated with sub-micron CMOS
technology to achieve fast switching speeds and is
designed for break-before-make operation.
FSA2467 features very low quiescent current even when
the control voltage is lower than the V
CC
supply. This
feature allows mobile handset applications direct interface
with baseband processor general-purpose I/Os.
Applications
Cell Phone
PDA
Portable Media Player
Ordering Information
Part Number
FSA2467MPX
FSA2467UMX
Package Description
16-lead Molded Leadless Package (MLP), JEDEC MO-220, 3x3mm Square
16-lead Ultrathin Molded Leadless Package (UMLP), 1.8x2.6mm
All packages are lead free per JEDEC: J-STD-020B standard.
Application Diagram
Figure 1. Application Diagram
© 2005 Fairchild Semiconductor Corporation
FSA2467 Rev. 1.0.5
www.fairchildsemi.com
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
Pin Assignments
Figure 2. Pin Assignments
Truth Table
Control Inputs
LOW
HIGH
Pin Descriptions
Function
nB
0
Connected to nA
nB
1
Connected to nA
Name
nA，nB
0
，nB
1
nS
Function
Data Ports
Control Input
Analog Symbol
Figure 3. Analog Symbol
© 2005 Fairchild Semiconductor Corporation
FSA2467 Rev. 1.0.5
www.fairchildsemi.com
2
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
S
V
IN
I
IK
I
SW
I
SWPEAK
T
STG
T
J
T
L
ESD
Supply Voltage
Switch Voltage
Input Voltage
Parameter
Min.
-0.5
-0.5
-0.5
-50
Max.
4.6
V
CC
+0.3
4.6
350
500
Unit
V
V
V
mA
mA
mA
ºC
ºC
ºC
kV
Input Diode Current
Switch Current
Peak Switch Current (Pulsed at 1ms duration, <10%
Duty Cycle)
Storage Temperature Range
Junction Temperature
Lead Temperature, Soldering 10 Seconds
Human Body Model
-65
+150
+150
+260
5.5
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
V
CC
V
IN
V
IN
T
A
Note
：
1.
Supply Voltage
Parameter
Control Input Voltage
Switch Input Voltage
Operating Temperature
(1)
Min.
1.65
0
0
-40
Max.
4.30
V
CC
V
CC
+85
Unit
V
V
V
ºC
Unused inputs must be held HIGH or LOW. They may not float.
© 2005 Fairchild Semiconductor Corporation
FSA2467 Rev. 1.0.5
www.fairchildsemi.com
3
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
DC Electrical Characteristics
Typical values are at 25ºC unless otherwise specified.
T
A
= +25ºC
Symbol
Parameter
Conditions
V
CC
(V)
Min.
4.3
V
IH
Input Voltage High
2.7 to 3.6
2.3 to 2.7
1.65 to 1.95
4.3
V
IL
Input Voltage Low
2.7 to 3.6
2.3 to 2.7
1.65 to 1.95
I
IN
Control Input Leakage
V
IN
=0V to V
CC
nA=0.3V,
V
CC
-0.3V
nB
0
or nB
1
=0.3V,
V
CC
-0.3V or
floating
nA=0.3V,V
CC
-
0.3V
nB
0
or nB
1
=0.3V,
V
CC
-0.3V or
floating
I
OUT
=100mA
nB
0
or
nB
1
=0V,0.8V,
1.8V,2.7V
I
OUT
=100mA, nB
0
or
1
=0V,0.7V,
1.2V, 2.3V
I
OUT
=100mA, nB
0
or nB
1
=1.0V
On Resistance Matching
(3)
Between Channels
I
OUT
=100mA, nB
0
or nB
1
=0.8V
I
OUT
=100mA, nB
0
or nB
1
=0.7V
I
OUT
=100mA, B
0
or nB
1
=0V to V
CC
V
IN
=0V to V
CC
I
OUT
=0V
V
IN
=1.8V
V
IN
=2.6V
1.95 to 4.30
-10.0
10.0
-50.0
50.0
nA
1.95 to 4.30
-10.0
10.0
-50.0
50.0
nA
1.65 to 4.30
-0.5
T
A
= -40 to
+85ºC
Min
1.4
1.3
1.1
0.9
0.7
0.5
0.4
0.4
0.5
Units
Typ.
Max.
Max.
V
V
μA
I
NO(OFF)
I
NC(OFF)
Off Leakage Current of
Port nB
0
and nB
1
I
A(ON)
On Leakage Current of
Port A
4.3
2.7
0.4
0.4
0.6
0.6
Ω
R
ON
Switch On Resistance
(2)
2.3
0.55
0.95
1.8
2.7
2.3
2.7
2.3
4.3
4.3
4.3
0.8
0.04
0.03
2.0
0.10
Ω
0.10
0.25
0.3
Ω
nA
μA
ΔR
ON
R
FLAT(ON)
I
CC
I
CCT
On Resistance Flatness
(4)
Quiescent Supply Current
Increase in I
CC
Current per
Control Voltage
-100
7.0
3.0
100
12.0
6.0
-500
500
15.0
7.0
Notes:
2. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch.
3.
∆
R
ON
=R
ON max
– R
ON min
measured at identical Vcc, temperature and voltage.
4. Flatness is defined as the difference between the maximum and minimum value of on resistance over the
specified range of conditions.
© 2005 Fairchild Semiconductor Corporation
FSA2467 Rev. 1.0.5
www.fairchildsemi.com
4
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
AC Electrical Characteristics
Typical values are at 25ºC unless otherwise specified.
Symbol
Parameter
Conditions
nB0 or nB1=1.5V
t
ON
Turn-On Time
R
L
=50Ω, C
L
=35pF
V
CC
Min.
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
T
A
= +25ºC
Typ.
Max.
50
65
80
32
42
52
12
15
20
15
10
8
-75
-75
-75
-75
-75
-75
85
0.02
0.02
0.02
T
A
= -40 to
+85ºC
Min.
Max.
60
75
90
40
50
60
Units
Figure
ns
Figure 7
nB0 or nB1=1.5V
t
OFF
Turn-Off Time
R
L
=50Ω, C
L
=35pF
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
ns
Figure 7
nB0 or nB1=1.5V
t
BBM
Break-Before-
Make Time
R
L
=50Ω, C
L
=35pF
C
L
=100pF,
V
GEN
=0V, R
GEN
=0Ω
Q
Charge Injection
C
L
=100pF,
V
GEN
=0V, R
GEN
=0Ω
C
L
=100pF,
V
GEN
=0V, R
GEN
=0Ω
f=100KHz,
R
L
=50Ω,C
L
=5pF
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
3.6 to 4.3
ns
Figure 8
pC
Figure
10
OIRR
Off Isolation
2.7 to 3.6
2.3 to 2.7
dB
Figure 9
Xtalk
Crosstalk
f=100KHz,
R
L
=50Ω, C
L
=5pF
R
L
=50Ω
R
L
=32Ω, V
IN
=2V
PP
,
f=20 to 20kHZ
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
dB
Figure 9
Figure
12
BW
-3dB Bandwidth
2.3 to 4.3
3.6 to 4.3
2.7 to 3.6
2.3. to 2.7
MHZ
THD
Total Harmonic
Distortion
R
L
=32Ω, V
IN
=2V
PP
,
f=20 to 20kHZ
R
L
=32Ω, V
IN
=2V
PP
,
f=20 to 20kHZ
%
Figure
13
Capacitance
Symbol
C
IN
C
OFF
C
ON
Parameter
Control Pin Input Capacitance
B Port Off Capacitance
A Port On Capacitance
Conditions
f=1MHZ
f=1MHZ
f=1MHZ
V
CC
0
3.3
3.3
T
A
= +25ºC Typical
1.5
32
118
Units
pF
pF
pF
Figure
Figure 7
Figure 7
Figure 7
© 2005 Fairchild Semiconductor Corporation
FSA2467 Rev. 1.0.5
www.fairchildsemi.com
5
Embedded System
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