Freescale Semiconductor
Advance Information
Document Number: MC33982
Rev. 14, 6/2008
Single Intelligent High-current
Self-protected Silicon High Side
Switch (2.0mΩ)
The 33982B is a self-protected silicon 2.0mΩ high side switch used
to replace electromechanical relays, fuses, and discrete devices in
power management applications. The 33982B is designed for harsh
environments, and it includes self-recovery features. The device is
suitable for loads with high inrush current, as well as motors and all
types of resistive and inductive loads.
Programming, control, and diagnostics are implemented via the
Serial Peripheral Interface (SPI). A dedicated parallel input is available
for alternate and Pulse Width Modulation (PWM) control of the output.
SPI programmable fault trip thresholds allow the device to be adjusted
for optimal performance in the application.
The 33982B is packaged in a power-enhanced 12 x 12 nonleaded
PQFN package with exposed tabs.
Features
33982B
HIGH SIDE SWITCH
Bottom View
PNA SUFFIX
SCALE 1:1
98ARL10521D
16-PIN PQFN
• Single 2.0mΩ max high side switch with parallel input or SPI
control
ORDERING INFORMATION
• 6.0V to 27V operating voltage with standby currents < 5.0μA
Temperature
Device
Package
• Output current monitoring with two SPI-selectable current ratios
Range (T
A
)
• SPI control of over-current limit, over-current fault blanking time,
MC33982BPNA/R2
-40°C to 125°C
16 PQFN
output-OFF open load detection, output ON/OFF control,
watchdog timeout, slew rates, and fault status reporting
• SPI status reporting of over-current, open and shorted loads,
over-temperature shutdown, under-voltage and over-voltage shutdown, fail-safe pin status, and program status
• Enhanced -16V reverse polarity V
PWR
protection
V
DD
V
DD
V
DD
V
PWR
33982B
VDD
I/O
I/O
SO
SCLK
FS
WAKE
SI
SCLK
CS
SO
RST
IN
LOAD
A/D
CSNS
FSI
GND
GND
HS
VPWR
GND
MCU
CS
SI
I/O
I/O
PWR GND
Figure 1. 33982B Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007-2008. All rights reserved.
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VDD
VPWR
I
UP
Internal
Regulator
V
IC
Over-voltage
Protection
Programmable
Switch Delay
0 ms–525ms
Selectable Slew
Rate Gate Drive
HS
Selectable Over-current
High Detection
150A or 100A
Selectable Over-
current Low Detection
Blanking Time
0.15ms–155ms
Selectable
Overcurrent
Low Detection
15A–50A
Open Load
Detection
Over-temperature
Detection
V
IC
I
UP
CS
SO
SPI
3.0MHz
SI
SCLK
FS
IN
RST
WAKE
Logic
I
DWN
R
DWN
Programmable
Watchdog
310ms–2500ms
FSI
Selectable
Output Current
Recopy
1/5400 or 1/40000
GND
Figure 2. 33982B Simplified Internal Block Diagram
CSNS
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Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
PIN CONNECTIONS
WAKE
CSNS
SCLK
VDD
RST
FSI
12 11 10 9
NC
Figure 3. 33982B Pin Connections
Table 1. Pin Definitions
Functional descriptions of many of these pins can be found in the Functional Pin Description section beginning on
page 15.
Pin
Number
1
Pin Name
CSNS
Pin
Function
Output
Formal Name
Output Current
Monitoring
Wake
Reset (Active Low)
Direct Input
Fault Status
(Active Low)
Fail-Safe Input
Chip Select
(Active Low)
Serial Clock
Serial Input
Definition
This pin is used to output a current proportional to the high side output
current and used externally to generate a ground-referenced voltage for
the microcontroller to monitor output current.
This pin is used to input a Logic [1] signal in order to enable the watchdog
timer function.
This input pin is used to initialize the device configuration and fault
registers, as well as place the device in a low current sleep mode.
The Input pin is used to directly control the output.
This is an open drain configured output requiring an external pull-up
resistor to V
DD
for fault reporting.
The value of the resistance connected between this pin and ground
determines the state of the output after a watchdog timeout occurs.
This input pin is connected to a chip select output of a master
microcontroller (MCU).
This input pin is connected to the MCU providing the required bit shift
clock for SPI communication.
This is a command data input pin connected to the SPI Serial Data
Output of the MCU or to the SO pin of the previous device in a daisy chain
of devices.
This is an external voltage input pin used to supply power to the SPI
circuit.
SO
CS
FS
IN
15
HS
SI
8 7
6 5
4
3 2
1
13
GND
TRANSPARENT
TOP VIEW
14
VPWR
16
HS
2
3
4
5
6
7
8
9
WAKE
RST
IN
FS
FSI
CS
SCLK
SI
Input
Input
Input
Output
Input
Input
Input
Input
10
VDD
Input
Digital Drain Voltage
(Power)
33982
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
Table 1. Pin Definitions (continued)
Functional descriptions of many of these pins can be found in the Functional Pin Description section beginning on
page 15.
Pin
Number
11
12
13
14
15, 16
Pin Name
SO
NC
GND
VPWR
HS
Pin
Function
Output
NC
Ground
Input
Output
Formal Name
Serial Output
No Connect
Ground
Positive Power
Supply
High-Side Output
Definition
This output pin is connected to the SPI Serial Data Input pin of the MCU
or to the SI pin of the next device in a daisy chain of devices.
This pin may not be connected.
This pin is the ground for the logic and analog circuitry of the device.
This pin connects to the positive power supply and is the source input of
operational power for the device.
Protected high side power output to the load. Output pins must be
connected in parallel for operation.
33982
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Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted.
Rating
ELECTRICAL RATINGS
Operating Voltage Range
Steady-state
VDD Supply Voltage
Input/Output Voltage
(1)
V
DD
V
IN
, RST, FSI,
CSNS, SI, SCLK,
CS, FS
V
SO
I
CL(WAKE)
I
CL(CSNS)
I
HS
V
HS
41
-15
E
CL
V
ESD1
V
ESD3
1.5
J
V
± 2000
±750
±500
V
PWR
-16 to 41
-0.3 to 5.5
- 0.3 to 7.0
V
V
V
Symbol
Value
Unit
SO Output Voltage
(1)
WAKE Input Clamp Current
CSNS Input Clamp Current
Output Current
(2)
Output Voltage
Positive
Negative
Output Clamp Energy
(3)
ESD Voltage
(4)
Human Body Model (HBM)
Charge Device Model (CDM)
Corner Pins (1, 12, 15, 16)
All Other Pins (2, 11, 13, 14)
- 0.3 to V
DD
+ 0.3
2.5
10
60
V
mA
mA
A
V
Notes
1. Exceeding this voltage limit may cause permanent damage to the device.
2. Continuous high side output current rating so long as maximum junction temperature is not exceeded. Calculation of maximum output
current using package thermal resistance is required.
3. Active clamp energy using single-pulse method (L = 16mH, R
L
= 0, V
PWR
= 12V, T
J
= 150°C).
4.
ESD1 testing is performed in accordance with the Human Body Model (HBM) (C
ZAP
= 100pF, R
ZAP
= 1500Ω); ESD3 testing is performed
in accordance with the Charge Device Model (CDM), Robotic (Czap = 4.0pF).
33982
Analog Integrated Circuit Device Data
Freescale Semiconductor
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