AT89C51RC-24JL datasheet, PDF - EEWORLD Datasheet

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AT89C51RC-24JL: DescriptionMicrocontroller, 8-Bit, FLASH, 24MHz, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44; CategoryThe embedded processor and controller Microcontrollers and processors; File Size432KB，36 Pages; ManufacturerAtmel (Microchip); Environmental Compliance

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AT89C51RC-24JL Overview

Microcontroller, 8-Bit, FLASH, 24MHz, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44

AT89C51RC-24JL Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Parts packaging code	LPCC
package instruction	QCCJ,
Contacts	44
Reach Compliance Code	compliant
Has ADC	NO
Address bus width	16
bit size	8
maximum clock frequency	24 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	S-PQCC-J44
JESD-609 code	e3
length	16.5862 mm
Number of I/O lines	32
Number of terminals	44
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	245
Certification status	Not Qualified
ROM programmability	FLASH
Maximum seat height	4.57 mm
speed	24 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	4 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	16.5862 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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Features

•

Compatible with MCS

-51 Products

32K Bytes of Reprogrammable Flash Memory

Endurance: 1000 Write/Erase Cycles

4V to 5.5V Operating Range

Fully Static Operation: 0 Hz to 33 MHz

Three-level Program Memory Lock

512 x 8-bit Internal RAM

32 Programmable I/O Lines

Three 16-bit Timer/Counters

Eight Interrupt Sources

Programmable Serial Channel

Low-power Idle and Power-down Modes

Interrupt Recovery from Power-down Mode

Hardware Watchdog Timer

Dual Data Pointer

Power-off Flag

Green (Pb/Halide-free) Packaging Option

8-bit

Microcontroller

with 32K Bytes

Flash

AT89C51RC

1. Description

The AT89C51RC is a low-power, high-performance CMOS 8-bit microcontroller with

32K bytes of Flash programmable read-only memory and 512 bytes of RAM. The

device is manufactured using Atmel’s high-density nonvolatile memory technology

and is compatible with the industry-standard 80C51 and 80C52 instruction set and

pinout. The on-chip Flash allows the program memory to be user programmed by a

conventional nonvolatile memory programmer. A total of 512 bytes of internal RAM

are available in the AT89C51RC. The 256-byte expanded internal RAM is accessed

via MOVX instructions after clearing bit 1 in the SFR located at address 8EH. The

other 256-byte RAM segment is accessed the same way as the Atmel AT89-series

and other 8052-compatible products. By combining a versatile 8-bit CPU with Flash

on a monolithic chip, the Atmel AT89C51RC is a powerful microcomputer which pro-

vides a highly-flexible and cost-effective solution to many embedded control

applications.

The AT89C51RC provides the following standard features: 32K bytes of Flash, 512

bytes of RAM, 32 I/O lines, three 16-bit timer/counters, a six-vector two-level interrupt

architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition,

the AT89C51RC is designed with static logic for operation down to zero frequency

and supports two software selectable power saving modes. The Idle Mode stops the

CPU while allowing the RAM, timer/counters, serial port, and interrupt system to con-

tinue functioning. The Power-down mode saves the RAM contents but freezes the

oscillator, disabling all other chip functions until the next external interrupt or hardware

reset.

1920C–MICRO–03/05

4. Pin Description

4.1

VCC

Supply voltage.

4.2

GND

Ground.

4.3

Port 0

Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink eight TTL

inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.

Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses

to external program and data memory. In this mode, P0 has internal pull-ups.

Port 0 also receives the code bytes during Flash programming and outputs the code bytes dur-

ing program verification.

External pull-ups are required during program verification.

4.4

Port 1

Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can

sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the inter-

nal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low

will source current (I

) because of the internal pull-ups.

In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input

(P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the follow-

ing table.

Port 1 also receives the low-order address bytes during Flash programming and verification.

Port Pin

P1.0

P1.1

Alternate Functions

T2 (external count input to Timer/Counter 2), clock-out

T2EX (Timer/Counter 2 capture/reload trigger and direction control)

4.5

Port 2

Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can

sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the inter-

nal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low

will source current (I

) because of the internal pull-ups.

Port 2 emits the high-order address byte during fetches from external program memory and dur-

ing accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this

application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external

data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special

Function Register.

Port 2 also receives the high-order address bits and some control signals during Flash program-

ming and verification.

AT89C51RC

1920C–MICRO–03/05

AT89C51RC

4.6

Port 3

Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can

sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-

nal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low

will source current (I

) because of the pull-ups.

Port 3 receives some control signals for Flash programming and verification.

Port 3 also serves the functions of various special features of the AT89C51RC, as shown in the

following table.

Port Pin

P3.0

P3.1

P3.2

P3.3

P3.4

P3.5

P3.6

P3.7

Alternate Functions

RXD (serial input port)

TXD (serial output port)

INT0 (external interrupt 0)

INT1 (external interrupt 1)

T0 (timer 0 external input)

T1 (timer 1 external input)

WR (external data memory write strobe)

RD (external data memory read strobe)

4.7

RST

Reset input. A high on this pin for two machine cycles while the oscillator is running resets the

device. This pin drives High for 98 oscillator periods after the Watchdog times out. The DISRTO

bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit

DISRTO, the RESET HIGH out feature is enabled.

4.8

ALE/PROG

Address Latch Enable is an output pulse for latching the low byte of the address during

accesses to external memory. This pin is also the program pulse input (PROG) during Flash

programming.

In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be

used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped dur-

ing each access to external data memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set,

ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high.

Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

4.9

PSEN

Program Store Enable is the read strobe to external program memory.

When the AT89C51RC is executing code from external program memory, PSEN is activated

twice each machine cycle, except that two PSEN activations are skipped during each access to

external data memory.

1920C–MICRO–03/05

AT89C51RC-24JL Related Products

	AT89C51RC-24JL	AT89C51RC-33JL	AT89C51RC-24PL	AT89C51RC-33AL	AT89C51RC-33PL	AT89C51RC-24PJ	AT89C51RC-24JJ	AT89C51RC-24AJ	AT89C51RC-24AL
Description	Microcontroller, 8-Bit, FLASH, 24MHz, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44	Microcontroller, 8-Bit, FLASH, 33MHz, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44	Microcontroller, 8-Bit, FLASH, 24MHz, CMOS, PDIP40, 0.600 INCH, PLASTIC, MS-011AC, DIP-40	Microcontroller, 8-Bit, FLASH, 33MHz, CMOS, PQFP44, 10 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-026ACB, TQFP-44	Microcontroller, 8-Bit, FLASH, 33MHz, CMOS, PDIP40, 0.600 INCH, PLASTIC, MS-011AC, DIP-40	Microcontroller, 8-Bit, FLASH, 24MHz, CMOS, PDIP40, 0.600 INCH, PLASTIC, MS-011AC, DIP-40	Microcontroller, 8-Bit, FLASH, 24MHz, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44	Microcontroller, 8-Bit, FLASH, 24MHz, CMOS, PQFP44, 10 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-026ACB, TQFP-44	Microcontroller, 8-Bit, FLASH, 24MHz, CMOS, PQFP44, 10 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-026ACB, TQFP-44
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Parts packaging code	LPCC	LPCC	DIP	QFP	DIP	DIP	LPCC	QFP	QFP
package instruction	QCCJ,	QCCJ,	DIP,	TQFP,	DIP,	DIP,	QCCJ,	TQFP,	TQFP,
Contacts	44	44	40	44	40	40	44	44	44
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant
Has ADC	NO	NO	NO	NO	NO	NO	NO	NO	NO
Address bus width	16	16	16	16	16	16	16	16	16
bit size	8	8	8	8	8	8	8	8	8
maximum clock frequency	24 MHz	33 MHz	24 MHz	33 MHz	33 MHz	24 MHz	24 MHz	24 MHz	24 MHz
DAC channel	NO	NO	NO	NO	NO	NO	NO	NO	NO
DMA channel	NO	NO	NO	NO	NO	NO	NO	NO	NO
External data bus width	8	8	8	8	8	8	8	8	8
JESD-30 code	S-PQCC-J44	S-PQCC-J44	R-PDIP-T40	S-PQFP-G44	R-PDIP-T40	R-PDIP-T40	S-PQCC-J44	S-PQFP-G44	S-PQFP-G44
JESD-609 code	e3	e3	e3	e3	e3	e3	e3	e3	e3
length	16.5862 mm	16.5862 mm	52.324 mm	10 mm	52.324 mm	52.324 mm	16.5862 mm	10 mm	10 mm
Number of I/O lines	32	32	32	32	32	32	32	32	32
Number of terminals	44	44	40	44	40	40	44	44	44
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	85 °C	85 °C	85 °C	70 °C
PWM channel	NO	NO	NO	NO	NO	NO	NO	NO	NO
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	QCCJ	DIP	TQFP	DIP	DIP	QCCJ	TQFP	TQFP
Package shape	SQUARE	SQUARE	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER	IN-LINE	FLATPACK, THIN PROFILE	IN-LINE	IN-LINE	CHIP CARRIER	FLATPACK, THIN PROFILE	FLATPACK, THIN PROFILE
Peak Reflow Temperature (Celsius)	245	245	260	260	245	260	245	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
ROM programmability	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH
Maximum seat height	4.57 mm	4.57 mm	4.826 mm	1.2 mm	4.826 mm	4.826 mm	4.57 mm	1.2 mm	1.2 mm
speed	24 MHz	33 MHz	24 MHz	33 MHz	33 MHz	24 MHz	24 MHz	24 MHz	24 MHz
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4 V	4.5 V	4 V	4.5 V	4.5 V	4 V	4 V	4 V	4 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	NO	YES	NO	NO	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL
Terminal surface	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN
Terminal form	J BEND	J BEND	THROUGH-HOLE	GULL WING	THROUGH-HOLE	THROUGH-HOLE	J BEND	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	2.54 mm	0.8 mm	2.54 mm	2.54 mm	1.27 mm	0.8 mm	0.8 mm
Terminal location	QUAD	QUAD	DUAL	QUAD	DUAL	DUAL	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	40	40	40	40	40	40	40	40	40
width	16.5862 mm	16.5862 mm	15.24 mm	10 mm	15.24 mm	15.24 mm	16.5862 mm	10 mm	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER
Maker	-	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)

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