M32C/88 Group (M32C/88T)
SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER
REJ03B0171-0110
Rev.1.10
Oct. 31, 2005
1. Overview
The M32C/88 Group (M32C/88T) microcomputer is a single-chip control unit that utilizes high-performance
silicon gate CMOS technology with the M32C/80 Series CPU core. The M32C/88 Group (M32C/88T) is
available in 144-pin and 100-pin plastic molded LQFP packages.
With a 16-Mbyte address space, this microcomputer combines advanced instruction manipulation capabili-
ties to process complex instructions by less bytes and execute instructions at higher speed.
It includes a multiplier and DMAC adequate for office automation, communication devices and industrial
equipments, and other high-speed processing applications.
1.1 Applications
Automobiles, audio, cameras, office equipment, communications equipment, portable equipment, etc.
Rev. 1.10 Oct. 31, 2005
REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
1.2 Performance Overview
Tables 1.1 and 1.2 list performance overview of the M32C/88 Group (M32C/88T).
Table 1.1 M32C/88 Group (M32C/88T) Performance (144-Pin Package)
Characteristic
CPU
Basic Instructions
Minimum Instruction Execution Time
Operating Mode
Address Space
Memory Capacity
Peripheral I/O Port
Function Multifunction Timer
Intelligent I/O
Performance
108 instructions
31.3 ns (f(BCLK)=32 MHz, V
CC
=4.2 V to 5.5 V)
Single-chip mode
16 Mbytes
See Table 1.3
123 I/O pins and 1 input pin
Timer A: 16 bits x 5 channels, Timer B: 16 bits x 6 channels
Three-phase motor control circuit
Time measurement function or Waveform generating function:
16 bits x 8 channels
Communication function (Clock synchronous serial I/O, Clock asyn-
chronous serial I/O, HDLC data processing)
5 Channels
Clock synchronous serial I/O, Clock asynchronous serial I/O,
IEBus
(1)
, I
2
C bus
(2)
3 channels Supporting CAN 2.0B specification
10-bit A/D converter: 1 circuit, 34 channels
8 bits x 2 channels
4 channels
Can be activated by all peripheral function interrupt sources
Immediate transfer, Calculation transfer and Chain transfer functions
CRC-CCITT
16 bits x 16 bits
15 bits x 1 channel (with prescaler)
40 internal and 8 external sources, 5 software sources
Interrupt priority level: 7
4 circuits
Main clock oscillation circuit(*), Sub clock oscillation circuit(*), On-chip
oscillator, PLL frequency synthesizer
(*)Equipped with a built-in feedback resistor. Ceramic resonator or
crystal oscillator must be connected externally
Main clock oscillation stop detect function
On-chip (option)
V
CC
=4.2 V to 5.5 V, (f(BCLK)=32 MHz)
28 mA (V
CC
=5 V, f(BCLK)=32 MHz)
10µA (V
CC
=5 V, f(BCLK)=32 kHz, in wait mode)
5.0 V
±
0.5 V
100 times (all space)
–40 to 85
o
C (T version)
–40 to 105
o
C (U version)
144-pin plastic molded LQFP
Serial I/O
CAN Module
A/D Converter
D/A Converter
DMAC
DMAC II
CRC Calculation Circuit
X/Y Converter
Watchdog Timer
Interrupt
Clock Generation Circuit
Oscillation Stop Detect Function
Cold Start-up/Warm Start-up
Determine Function
Electrical Supply Voltage
Charact- Power Consumption
eristics
Flash
Program/Erase Supply Voltage
Memory Program and Erase Endurance
Operating Ambient Temperature
Package
NOTES:
1. IEBus is a trademark of NEC Electronics Corporation.
2. I
2
C bus is a trademark of Koninklijke Philips Electronics N. V.
All options are on a request basis.
Rev. 1.10 Oct. 31, 2005
REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
Table 1.2 M32C/88 Group (M32C/88T) Performance (100-Pin Package)
Characteristic
CPU
Basic Instructions
Minimum Instruction Execution Time
Operating Mode
Address Space
Memory Capacity
Peripheral I/O Port
Function Multifunction Timer
Intelligent I/O
Performance
108 instructions
31.3 ns (f(BCLK)=32 MHz, V
CC
=4.2 V to 5.5 V)
Single-chip mode
16 Mbytes
See Table 1.3
87 I/O pins and 1 input pin
Timer A: 16 bits x 5 channels, Timer B: 16 bits x 6 channels
Three-phase motor control circuit
Time measurement function or Waveform generating function:
16 bits x 8 channels
Communication function (Clock synchronous serial I/O, Clock asyn-
chronous serial I/O, HDLC data processing)
5 Channels
Clock synchronous serial I/O, Clock asynchronous serial I/O,
IEBus
(1)
, I
2
C bus
(2)
3 channels Supporting CAN 2.0B specification
10-bit A/D converter: 1 circuit, 34 channels
8 bits x 2 channels
4 channels
Can be activated by all peripheral function interrupt sources
Immediate transfer, Calculation transfer and Chain transfer functions
CRC-CCITT
16 bits x 16 bits
15 bits x 1 channel (with prescaler)
40 internal and 8 external sources, 5 software sources
Interrupt priority level: 7
4 circuits
Main clock oscillation circuit(*), Sub clock oscillation circuit(*), On-chip
oscillator, PLL frequency synthesizer
(*)Equipped with a built-in feedback resistor. Ceramic resonator or
crystal oscillator must be connected externally
Main clock oscillation stop detect function
On-chip (option)
V
CC
=4.2 V to 5.5 V, (f(BCLK)=32 MHz)
28 mA (V
CC
=5 V, f(BCLK)=32 MHz)
10µA (V
CC
=5 V, f(BCLK)=32 kHz, in wait mode)
5.0 V
±
0.5 V
100 times (all space)
–40 to 85
o
C (T version)
–40 to 105
o
C (U version)
100-pin plastic molded LQFP
Serial I/O
CAN Module
A/D Converter
D/A Converter
DMAC
DMAC II
CRC Calculation Circuit
X/Y Converter
Watchdog Timer
Interrupt
Clock Generation Circuit
Oscillation Stop Detect Function
Cold Start-up/Warm Start-up
Determine Function
Electrical Supply Voltage
Charact- Power Consumption
eristics
Flash
Program/Erase Supply Voltage
Memory Program and Erase Endurance
Operating Ambient Temperature
Package
NOTES:
1. IEBus is a trademark of NEC Electronics Corporation.
2. I
2
C bus is a trademark of Koninklijke Philips Electronics N. V.
All options are on a request basis.
Rev. 1.10 Oct. 31, 2005
REJ03B0171-0110
Page 3
of 57
M32C/88 Group (M32C/88T)
1. Overview
1.3 Block Diagram
Figure 1.1 shows a block diagram of the M32C/88 Group (M32C/88T) microcomputer.
8
8
8
8
8
8
8
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
Peripheral Functions
Timer (16 bits)
Timer A: 5 channels
Timer B: 6 channels
Three-Phase Motor Control Circuit
Watchdog Timer (15 bits)
D/A Converter:
8 bits X 2 channels
A/D Converter:
1 circuit
Standard: 10 inputs
Maximum: 34 inputs
(2)
UART/Clock Synchronous Serial I/O:
5 channels
X/Y Converter:
16 bits X 16 bits
CAN Module: 3 channels
Clock Generation Circuit
X
IN
- X
OUT
X
CIN
- X
COUT
On-chip Oscillator
PLL Frequency Synthesizer
Port P7
8
DMAC
Port P8
DMACII
CRC Calculation Circuit (CCITT):
X
16
+X
12
+X
5
+1
7
P8
5
M32C/80 series CPU Core
Intelligent I/O
Time Measurement: 8 channels
Wave Generating: 8 channels
Communication Functions:
Clock Synchronous Serial I/O,
UART,
HDLC Data Processing
R0H
R1H
R2
R3
A0
A1
FB
SB
R0L
R1L
FLG
INTB
ISP
USP
PC
SVF
SVP
VCT
Memory
Port P9
ROM
8
RAM
Port P10
8
Multiplier
Port P14
Port P15
Port P11
Port P12
Port P13
7
8
5
8
8
(Note 1)
NOTES:
1. Ports P11 to P15 are provided in the 144-pin package only.
2. Included in the 144-pin package only.
Figure 1.1 M32C/88 Group (M32C/88T) Block Diagram
Rev. 1.10 Oct. 31, 2005
REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
1.4 Product Information
Table 1.3 lists the product information. Figure 1.2 shows the product numbering system.
Table 1.3 M32C/88 Group (1) (T version, M32C/88T)
Type Number
M30882FJTGP
M30880FJTGP
M30882FHTGP
M30880FHTGP
M30882FWTGP
M30880FWTGP
(D): Under development
(D)
(D)
(D)
(D)
(D)
(D)
Package Type
PLQP0144KA-A (144P6Q-A)
512K+4K
PLQP0100KB-A (100P6Q-A)
PLQP0144KA-A (144P6Q-A)
384K+4K
PLQP0100KB-A (100P6Q-A)
PLQP0144KA-A (144P6Q-A)
320K+4K
PLQP0100KB-A (100P6Q-A)
18K
Flash Memory
T version
(High-reliability
85° C)
ROM
Capacity
As of October, 2005
RAM
Capacity
Remarks
Table 1.3 M32C/88 Group (2) (U version, M32C/88T)
Type Number
M30882FJUGP
M30880FJUGP
M30882FHUGP
M30880FHUGP
M30882FWUGP
M30880FWUGP
(D): Under development
(D)
(D)
(D)
(D)
(D)
(D)
Package Type
PLQP0144KA-A (144P6Q-A)
512K+4K
PLQP0100KB-A (100P6Q-A)
PLQP0144KA-A (144P6Q-A)
384K+4K
PLQP0100KB-A (100P6Q-A)
PLQP0144KA-A (144P6Q-A)
320K+4K
PLQP0100KB-A (100P6Q-A)
18K
ROM
Capacity
As of October, 2005
RAM
Capacity
Remarks
Flash Memory
U version
(High-reliability
105° C)
NOTE:
Contact our sales office if you are interested in the V version.
Rev. 1.10 Oct. 31, 2005
REJ03B0171-0110
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of 57
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