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UPD431000AGU-A12-9JH

Description
Standard SRAM, 128KX8, 120ns, CMOS, PDSO32, 8 X 13.40 MM, PLASTIC, TSOP1-32
Categorystorage    storage   
File Size206KB,28 Pages
ManufacturerNEC Electronics
Download Datasheet Parametric View All

UPD431000AGU-A12-9JH Overview

Standard SRAM, 128KX8, 120ns, CMOS, PDSO32, 8 X 13.40 MM, PLASTIC, TSOP1-32

UPD431000AGU-A12-9JH Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeTSOP1
package instructionTSOP1,
Contacts32
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time120 ns
JESD-30 codeR-PDSO-G32
JESD-609 codee0
length11.8 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize128KX8
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width8 mm
Base Number Matches1
DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD431000A
1M-BIT CMOS STATIC RAM
128K-WORD BY 8-BIT
Description
The
µ
PD431000A is a high speed, low power, and 1,048,576 bits (131,072 words by 8 bits) CMOS static RAM.
The
µ
PD431000A has two chip enable pins (/CE1, CE2) to extend the capacity. And battery backup is available. In
addition to this, A and B versions are low voltage operations.
The
µ
PD431000A is packed in 32-pin plastic DIP, 32-pin plastic SOP and 32-pin plastic TSOP (I) (8
×
13.4 mm) and
(8
×
20 mm).
Features
131,072 words by 8 bits organization
Fast access time: 70, 85, 100, 120, 150 ns (MAX.)
Low voltage operation (A version: V
CC
= 3.0 to 5.5 V, B version: V
CC
= 2.7 to 5.5 V)
Operating ambient temperature: T
A
= 0 to 70
°C
Low V
CC
data retention: 2.0 V (MIN.)
Output Enable input for easy application
Two Chip Enable inputs: /CE1, CE2
Part number
Access time
ns (MAX.)
Operating supply Operating ambient
voltage
V
temperature
°C
0 to 70
At operating
mA (MAX.)
70
Supply current
At standby
At data retention
µ
A (MAX.)
100
20
µ
A (MAX.)
Note1
15
3
µ
PD431000A-xxL
µ
PD431000A-xxLL
µ
PD431000A-Axx
µ
PD431000A-Bxx
70
70
70, 85
4.5 to 5.5
Note2
, 100
3.0 to 5.5
2.7 to 5.5
35
30
Note3
13
11
Note5
Note2
, 120, 150
Note4
Note6
Notes 1.
T
A
40
°C
2.
V
CC
= 4.5 to 5.5 V
3.
70 mA (V
CC
> 3.6 V)
4.
70 mA (V
CC
> 3.3 V)
5.
20
µ
A (V
CC
> 3.6 V)
6.
20
µ
A (V
CC
> 3.3 V)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M11657EJAV0DS00 (10th edition)
Date Published April 2001 NS CP (K)
Printed in Japan
The mark
5
shows major revised points.
©
1990, 1993, 1995

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