UNISONIC TECHNOLOGIES CO., LTD
19N10
Preliminary
Power MOSFET
100V N-Channel MOSFET
DESCRIPTION
The UTC 100V N-Channel enhancement mode power field
effect transistors (MOSFET) are produced by UTC’s planar stripe,
DMOS technology which has been tailored especially in the
avalanche and commutation mode to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulse. They are suited for low voltage
applications such as audio amplifier, high efficiency switching
DC/DC converters, and DC motor control.
FEATURES
* R
DS(ON)
= 0.1Ω @V
GS
= 10 V
* Ultra low gate charge ( typical 19nC )
* Low reverse transfer Capacitance ( C
RSS
= typical 32pF )
* Fast switching capability
* Avalanche energy Specified
* Improved dv/dt capability, high ruggedness
Lead-free:
19N10L
Halogen-free: 19N10G
SYMBOL
2.Drain
1.Gate
3.Source
ORDERING INFORMATION
Normal
19N10-TM3-T
Ordering Number
Lead Free
19N10L-TM3-T
Halogen Free
19N10G-TM3-T
Package
TO-251
Pin Assignment
1
2
3
G
D
S
Packing
Tube
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Copyright © 2008 Unisonic Technologies Co., Ltd
1 of 6
QW-R502-261.a
19N10
PARAMETER
Preliminary
Power MOSFET
ABSOLUTE MAXIMUM RATINGS
(T
C
=25℃, unless otherwise specified)
RATINGS
UNIT
Drain-Source Voltage
100
V
Gate-Source Voltage
± 25
V
Continuous Drain Current
15.6
A
Pulsed Drain Current (Note 2)
62.4
A
Avalanche Current (Note 2)
15.6
A
Single Pulsed Avalanche Energy (Note 3)
220
mJ
Repetitive Avalanche Energy (Note 2)
5.0
mJ
Peak Diode Recovery dv/dt (Note 4)
6.0
V/ns
Power Dissipation
50
W
P
D
0.4
W/°C
Derate above 25°C
Junction Temperature
T
J
+150
℃
Storage Temperature
T
STG
-55 ~ +150
℃
Note: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. Pulse width limited by T
J(MAX)
3. L=1.35mH, I
AS
=15.6A, V
DD
=25V, R
G
=25
Ω,
Starting T
J
=25°C
4. I
SD
≤19A,
di/dt
≤
300A/µs, V
DD
≤BV
DSS
, Starting T
J
=25°C
SYMBOL
V
DSS
V
GSS
I
D
I
DM
I
AR
E
AS
E
AR
dv/dt
THERMAL DATA
PARAMETER
Junction-to-Ambient
Junction-to-Case
SYMBOL
θ
JA
θ
JC
RATINGS
110
2.5
UNIT
℃
/W
℃
/W
ELECTRICAL CHARACTERISTICS
(T
J
=25°C, unless otherwise specified)
PARAMETER
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Drain-Source Leakage Current
Forward
Gate-Source Leakage Current
Reverse
ON CHARACTERISTICS
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transconductance
DYNAMIC PARAMETERS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING PARAMETERS
Total Gate Charge
Gate Source Charge
Gate Drain Charge
Turn-ON Delay Time
Turn-ON Rise Time
Turn-OFF Delay Time
Turn-OFF Fall-Time
SYMBOL
BV
DSS
∆BV
DSS
/
∆T
J
I
DSS
I
GSS
V
GS(TH)
R
DS(ON)
g
FS
C
ISS
C
OSS
C
RSS
Q
G
Q
GS
Q
GD
t
D(ON)
t
R
t
D(OFF)
t
F
TEST CONDITIONS
V
GS
=0V, I
D
=250µA
I
D
=250µA,
Referenced to 25°C
V
DS
=100V, V
GS
=0V
V
GS
=25V, V
DS
=0V
V
GS
=-25V, V
DS
=0V
V
DS
=V
GS
, I
D
=250µA
V
GS
=10V, I
D
=7.8A
V
DS
=40V, I
D
=7.8A (Note 1)
MIN
100
0.1
1
100
-100
2.0
0.078
11
600
165
32
19
3.9
9.0
7.5
150
20
65
780
215
40
25
4.0
0.1
TYP
MAX UNIT
V
V/°C
µA
nA
V
Ω
S
pF
pF
pF
nC
nC
nC
ns
ns
ns
ns
V
DS
=25V, V
GS
=0V, f=1.0 MHz
V
DS
=80V, I
D
=19A, V
GS
=10V
(Note 1, 2)
V
DD
=50V, I
D
=19A, R
G
=25Ω
(Note 1, 2)
25
310
50
140
UNISONIC TECHNOLOGIES CO., LTD
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2 of 6
QW-R502-261.a
19N10
Preliminary
Power MOSFET
ELECTRICAL CHARACTERISTICS
(Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
SOURCE- DRAIN DIODE RATINGS AND CHARACTERISTICS
Diode Forward Voltage
V
SD
V
GS
=0V, I
S
=15.6A
Maximum Body-Diode Continuous Current
I
S
Maximum Pulsed Drain-Source Diode
I
SM
Forward Current
Body Diode Reverse Recovery Time
t
RR
V
GS
= 0V, I
S
=19A,
dI
F
/dt=100A/μs (Note 1)
Body Diode Reverse Recovery Charge
Q
RR
Note: 1. Pulse Test : Pulse width
≤300µs,
Duty cycle
≤
2%
Note:
2. Essentially independent of operating temperature
MIN
TYP
MAX UNIT
1.5
15.6
62.4
78
200
V
A
A
ns
nC
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QW-R502-261.a
19N10
Preliminary
Power MOSFET
TEST CIRCUITS AND WAVEFORMS
D.U.T.
+
V
DS
-
+
-
L
R
G
Driver
V
GS
Same Type
as D.U.T.
* dv/dt controlled by R
G
* I
SD
controlled by pulse period
* D.U.T.-Device Under Test
V
DD
Fig. 1A Peak Diode Recovery dv/dt Test Circuit
V
GS
(Driver)
Period
P.W.
D=
P. W.
Period
V
GS
= 10V
I
FM
, Body Diode Forward Current
I
SD
(D.U.T.)
I
RM
Body Diode Reverse Current
di/dt
Body Diode Recovery dv/dt
V
DS
(D.U.T.)
V
DD
Body Diode
Forward Voltage Drop
Fig. 1B Peak Diode Recovery dv/dt Waveforms
UNISONIC TECHNOLOGIES CO., LTD
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4 of 6
QW-R502-261.a
19N10
Preliminary
Power MOSFET
TEST CIRCUITS AND WAVEFORMS (Cont.)
Fig. 2A Switching Test Circuit
Fig. 2B Switching Waveforms
Fig. 3A Gate Charge Test Circuit
Fig. 3B Gate Charge Waveform
Fig. 4A Unclamped Inductive Switching Test Circuit
Fig. 4B Unclamped Inductive Switching Waveforms
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www.unisonic.com.tw
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QW-R502-261.a
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