TC90A53N/F
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC90A53N,TC90A53F
3-LINE DIGITAL Y / C SEPARATOR IC
TC90A53N / F is a 3-line digital Y / C separator IC which separates
luminance signal Y and chroma signal C from composite video signals.
Toshiba’s logical comb filter realizes good Y / C separation at low cost.
FEATURES
·
TV format : NTSC (3.58)
·
Dynamic comb filter
·
Vertical edge enhancement circuit
·
PLL 4 × multiplier circuit
·
Internal 8-bit 4 fsc AD converter
·
Internal 8-bit 4 fsc DA converter (2 ch)
·
1-line color dot interference reducer circuit
·
Sync tip clamp circuit
·
Internal 2H-line memory
·
Color killer mode (Y / C separation off)
·
Chroma signal C output wide band mode
·
Package : SDIP 28-pin and SOP 28-pin
·
5 V single power supply
Weight:
SDIP28-P-400-1.78: 1.7 g (Typ.)
SOP28-P-450-1.27: 0.8 g (Typ.)
000707EBA1
·
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the
buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and
to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or
damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling
Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
·
The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy
control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
·
The products described in this document are subject to the foreign exchange and foreign trade laws.
·
The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
·
The information contained herein is subject to change without notice.
2001-02-08
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TC90A53N/F
PIN FUNCTION
PIN
No.
PIN
NAME
FUNCTION
I/O
INTERFACE
1
V
REFL
ADC bias pin. Sets lower limit of range D
for ADC. Fixed internally to 1.5 V (typ.).
Connect 0.01
mF
capacitor between this
pin and GND.
¾
2
3
V
SS1
V
DD1
ADC GND
ADC power supply (+5 V)
¾
¾
¾
¾
4
V
REFH
ADC bias pin. Sets upper limit of range D
for ADC. Fixed internally to 3.5 V (typ.).
Connect 0.01
mF
capacitor between this
pin and GND.
¾
5
ADIN
Composite video signal input pin.
I
6
BIAS1
ADC bias pin. Fixed internally to 1.3 V
(typ.). Connect 0.01
mF
capacitor between
this pin and GND.
¾
7
CLAMPC
External filter used for Sync tip clamping
the input composite video signal. Connect
510 kW and 4700 pF between this pin and
GND.
¾
8
TEST
Test pin. Connect GND.
¾
¾
9
1 / 2 V
DD
Line-memory bias. Supply 1 / 2 V
DD
by
dividing digital power supply using a
resistor. Connect 0.01
mF
capacitor
between this pin and GND.
I
2001-02-08
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TC90A53N/F
PIN
No.
PIN
NAME
FUNCTION
I/O
INTERFACE
10
V
FIL
Connect a VCO filter.
¾
11
CKIN
Inputs clock. First DC-cut f
sc
clock
in sync with color burst using a
capacitor, then input the result.
I
12
13
V
DD2
V
SS2
PLL power supply (+5 V)
PLL GND
¾
¾
¾
¾
14
KILLER
Selects color killer mode.
L : Color mode
H : Black and white mode
(Y / C sep off)
I
15
CBPF
Selects color signal horizontal band.
L : Wide band (does not pass BPF)
H : Narrow band (passes BPF)
I
Select vertical enhance amount.
VENH0 VENH1
16
17
VENH0
VENH1
L
H
L
H
L : Small (+0.25)
L : Small (+0.25)
H : Medium (+0.75)
H : Large (+1.25)
I
18
1 LINE
1-line color dot interference reducer
ON / OFF
L : 1-line color dot interference
reducer ON
H : 1-line color dot interference
reducer OFF
I
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NXP MCU
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