256Kx16 Bit High Speed Static RAM(3.3V Operating).
Operated at Commercial and Industrial Temperature Ranges.
CMOS SRAM
Revision History
Rev No.
Rev. 0.0
Rev. 0.1
Rev. 0.2
Rev. 0.3
History
Initial release with Preliminary.
Add Low Ver.
Package dimensions modify on page 11.
Change ICC , ISB, ISB1
Item
I
CC(Commercial)
8ns
10ns
12ns
15ns
8ns
10ns
12ns
15ns
I
SB
I
SB1(L-ver.)
Previous
110mA
90mA
80mA
70mA
130mA
115mA
100mA
85mA
30mA
0.5mA
Current
80mA
65mA
55mA
45mA
100mA
85mA
75mA
65mA
20mA
1.2mA
Draft Data
Aug. 20. 2001
Sep. 19. 2001
Sep. 28. 2001
Oct. 09. 2001
Remark
Preliminary
Preliminary
Preliminary
Preliminary
I
CC(Industrial)
Rev. 0.4
1. Correct AC parameters : Read & Write Cycle
2. Change Data Retention Current :
from 0.45mA to 1.1mA when Vcc=3.0V
from 0.35mA to 0.9mA when Vcc=2.0V
3. Limit L-Ver. to 48 TBGA Package
1. Delete 12ns,15ns speed bin.
2. Change Icc for Industrial mode.
Item
8ns
I
CC(Industrial)
10ns
Nov.23. 2001
Preliminary
Rev. 1.0
Dec.18. 2001
Previous
100mA
85mA
Current
90mA
75mA
Final
Rev. 2.0
Rev. 2.1
Rev. 2.2
Rev. 2.3
Rev. 3.0
Rev. 4.0
1. Add tBA,tBLZ,tBHZ,tBW AC parematers.
1. Correct the Package dimensions(48-TBGA)
1. Add the tPU and tPD into the waveform.
1. Change the current parameters (Isb1 L-ver, Idr)
1. Add the Lead Free Package type.
1. Change the Idr parameters
previous
Current
Idr(2V)
1.2mA
1.4mA
Idr(3V)
1.8mA
2.0mA
Feb. 14. 2002
Oct. 23. 2002
Mar. 10, 2003
June. 12, 2003
June. 20, 2003
Mar. 15, 2004
Final
Final
Final
Final
Final
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev 4.0
Mar. 2004
PRELIMPreliminaryPPPPPPPPPINARY
K6R4016V1D
4Mb Async. Fast SRAM Ordering Information
Org.
1M x4
K6R4004V1D-J(K)C(I) 08/10
K6R4008C1D-J(K,T,U)C(I) 10
512K x8
K6R4008V1D-J(K,T,U)C(I) 08/10
K6R4016C1D-J(K,T,U,E)C(I) 10
256K x16 K6R4016V1D-J(K,T,U,E)C(I,L,P) 08/10
3.3
5
3.3
8/10
10
8/10
3.3
5
8/10
10
Part Number
K6R4004C1D-J(K)C(I) 10
VDD(V)
5
Speed ( ns )
10
PKG
J : 32-SOJ
K : 32-SOJ(LF)
Temp. & Power
CMOS SRAM
C : Commercial Temperature
,Normal Power Range
I : Industrial Temperature
J : 36-SOJ
K : 36-SOJ(LF)
,Normal Power Range
T : 44-TSOP2
L : Commercial Temperature
U : 44-TSOP2(LF)
,Low Power Range
P : Industrial Temperature
J : 44-SOJ
,Low Power Range
K : 44-SOJ(LF)
T : 44-TSOP2
U : 44-TSOP2(LF)
E : 48-TBGA
-2-
Rev 4.0
Mar. 2004
PRELIMPreliminaryPPPPPPPPPINARY
K6R4016V1D
256K x 16 Bit High-Speed CMOS Static RAM
FEATURES
• Fast Access Time 8,10ns(Max.)
• Low Power Dissipation
Standby (TTL) : 20mA(Max.)
(CMOS) : 5mA(Max.)
1.2mA(Max.)L-Ver. only.
Operating K6R4016V1D-08 : 80mA(Max.)
K6R4016V1D-10 : 65mA(Max.)
• Single 3.3
±0.3V
Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• 2V Minimum Data Retention: L-Ver. only.
• Center Power/Ground Pin Configuration
• Data Byte Control : LB : I/O1~ I/O8, UB : I/O9~ I/O16
• Standard Pin Configuration
K6R4016V1D-J : 44-SOJ-400
K6R4016V1D-K : 44-SOJ-400(Lead-Free)
K6R4016V1D-T : 44-TSOP2-400BF
K6R4016V1D-U : 44-TSOP2-400BF (Lead-Free)
K6R4016V1D-E : 48-TBGA with 0.75 Ball pitch
(7mm X 9mm)
• Operating in Commercial and Industrial Temperature range.
CMOS SRAM
GENERAL DESCRIPTION
The K6R4016V1D is a 4,194,304-bit high-speed Static Random
Access Memory organized as 262,144 words by 16 bits. The
K6R4016V1D uses 16 common input and output lines and has
an output enable pin which operates faster than address
access time at read cycle. Also it allows that lower and upper
byte access by data byte control(UB, LB). The device is fabri-
cated using SAMSUNG′s advanced CMOS process and
designed for high-speed circuit technology. It is particularly well
suited for use in high-density high-speed system applications.
The K6R4016V1D is packaged in a 400mil 44-pin plastic SOJ
or TSOP(II) forward or 48 TBGA.
FUNCTIONAL BLOCK DIAGRAM
Clk Gen.
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
I/O
1
~I/O
8
I/O
9
~I/O
16
Pre-Charge Circuit
Row Select
Memory Array
1024 Rows
256 x 16 Columns
Data
Cont.
Data
Cont.
Gen.
CLK
I/O Circuit &
Column Select
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
WE
OE
UB
LB
CS
-3-
Rev 4.0
Mar. 2004
PRELIMPreliminaryPPPPPPPPPINARY
K6R4016V1D
PIN CONFIGURATION
(Top View)
1
2
3
4
5
6
CMOS SRAM
A
0
A
1
A
2
A
3
A
4
CS
I/O
1
I/O
2
I/O
3
1
2
3
4
5
6
7
8
9
44 A
17
43 A
16
42 A
15
41 OE
40 UB
39 LB
38 I/O
16
37 I/O
15
36 I/O
14
D
Vss
I/O4
A17
A7
I/O12
Vcc
C
I/O2
I/O3
A5
A6
I/O11
I/O10
B
I/O1
UB
A3
A4
CS
I/O9
A
LB
OE
A0
A1
A2
N.C
I/O
4
10
Vcc 11
Vss 12
I/O
5
13
I/O
6
14
I/O
7
15
I/O
8
16
WE 17
A
5
18
A
6
19
A
7
20
A
8
21
A
9
22
SOJ/
TSOP2
35 I/O
13
34 Vss
33 Vcc
32 I/O
12
31 I/O
11
30 I/O
10
29 I/O
9
28 N.C
27 A
14
26 A
13
25 A
12
24 A
11
23 A
10
H
N.C
A8
A9
A10
A11
N.C
G
I/O8
N.C
A12
A13
WE
I/O16
F
I/O7
I/O6
A14
A15
I/O14
I/O15
E
Vcc
I/O5
N.C
A16
I/O13
Vss
48-TBGA
PIN FUNCTION
Pin Name
A
0
- A
17
WE
CS
OE
LB
UB
I/O
1
~ I/O
16
V
CC
V
SS
N.C
Pin Function
Address Inputs
Write Enable
Chip Select
Output Enable
Lower-byte Control(I/O
1
~I/O
8
)
Upper-byte Control(I/O
9
~I/O
16
)
Data Inputs/Outputs
Power(+3.3V)
Ground
No Connection
ABSOLUTE MAXIMUM RATINGS*
Parameter
Voltage on Any Pin Relative to V
SS
Voltage on V
CC
Supply Relative to V
SS
Power Dissipation
Storage Temperature
Operating Temperature
Commercial
Industrial
Symbol
V
IN
, V
OUT
V
CC
P
D
T
STG
T
A
T
A
Rating
-0.5 to 4.6
-0.5 to 4.6
1.0
-65 to 150
0 to 70
-40 to 85
Unit
V
V
W
°C
°C
°C
*
Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
-4-
Rev 4.0
Mar. 2004
PRELIMPreliminaryPPPPPPPPPINARY
K6R4016V1D
RECOMMENDED DC OPERATING CONDITIONS*
(T
A
=0 to 70°C)
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min
3.0
0
2.0
-0.3**
Typ
3.3
0
-
-
Max
3.6
0
V
CC
+0.3***
0.8
Unit
V
V
V
V
CMOS SRAM
* The above parameters are also guaranteed at industrial temperature range.
** V
IL
(Min) = -2.0V a.c(Pulse Width
≤
8ns) for I
≤
20mA
.
*** V
IH
(Max) = V
CC
+ 2.0V a.c (Pulse Width
≤
8ns) for I
≤
20mA.
DC AND OPERATING CHARACTERISTICS*
(T
A
=0 to 70°C, Vcc=3.3±0.3V, unless otherwise specified)
Parameter
Input Leakage Current
Output Leakage Current
Operating Current
Symbol
I
LI
I
LO
I
CC
V
IN
=V
SS
to V
CC
CS=V
IH
or OE=V
IH
or WE=V
IL
V
OUT
=V
SS
to V
CC
Min. Cycle, 100% Duty
CS=V
IL,
V
IN
=V
IH
or V
IL,
I
OUT
=0mA
Com.
8ns
10ns
Ind.
8ns
10ns
Standby Current
I
SB
I
SB1
Min. Cycle, CS=V
IH
f=0MHz, CS≥V
CC
-0.2V,
V
IN
≥V
CC
-0.2V or V
IN
≤0.2V
I
OL
=8mA
I
OH
=-4mA
Normal
L-ver.**
Test Conditions
Min
-2
-2
-
-
-
-
-
-
-
-
2.4
Max
2
2
80
65
90
75
20
5
2.4
0.4
-
V
V
mA
Unit
µA
µA
mA
Output Low Voltage Level
Output High Voltage Level
V
OL
V
OH
* The above parameters are also guaranteed at industrial temperature range.
** L-var is only supported with TBGA package type.
京公网安备 11010802033920号
EEWORLD
