LRS1392A datasheet, PDF - EEWORLD Datasheet

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LRS1392A: DescriptionMemory Circuit, 4MX16, CMOS, PBGA72, 8 X 11 MM, PLASTIC, CSP-72; Categorystorage storage; File Size744KB，45 Pages; ManufacturerSHARP; Websitehttp://sharp-world.com/products/device/

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LRS1392A Overview

Memory Circuit, 4MX16, CMOS, PBGA72, 8 X 11 MM, PLASTIC, CSP-72

LRS1392A Parametric

Parameter Name	Attribute value
Maker	SHARP
package instruction	8 X 11 MM, PLASTIC, CSP-72
Reach Compliance Code	unknown
Other features	SRAM IS ORGANISED AS 512K X 16
JESD-30 code	R-PBGA-B72
length	11 mm
memory density	67108864 bit
Memory IC Type	MEMORY CIRCUIT
memory width	16
Number of functions	1
Number of terminals	72
word count	4194304 words
character code	4000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-25 °C
organize	4MX16
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Certification status	Not Qualified
Maximum seat height	1.4 mm
Maximum supply voltage (Vsup)	3.3 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
width	8 mm
Base Number Matches	1

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RELIMINARY

RODUCT

PECIFICATIONS

Integrated Circuits Group

64M (x16) Flash Memory + 8M (x16) SRAM

(Model No.: LRS1392A)

Stacked Chip Flash Memory

LRS1392A

Spec No.: MFM2-J14510

Issue Date: May 15, 2002

sharp

LRS1392A

•

Handle this document carefully for it contains material protected by international copyright law.

Any reproduction, full or in part, of this material is prohibited without the express written permission

of the company.

•

When using the products covered herein, please observe the conditions written herein and the

precautions outlined in the following paragraphs. In no event shall the company be liable for

any damages resulting from failure to strictly adhere to these conditions and precautions.

(1) The products covered herein are designed and manufactured for the following application areas.

When using the products covered herein for the equipment listed in Paragraph (2), even for the

following application areas, be sure to observe the precautions given in Paragraph (2). Never use

the products for the equipment listed in Paragraph (3).

•

Office electronics

Instrumentation and measuring equipment

Machine tools

Audiovisual equipment

Home appliance

Communication equipment other than for trunk lines

(2) Those contemplating using the products covered herein for the following equipment

which demands high reliability, should first contact a sales representative of the company and

then accept responsibility for incorporating into the design fail-safe operation, redundancy, and

other appropriate measures for ensuring reliability and safety of the equipment and the overall

system.

• Control and safety devices for airplanes, trains, automobiles, and other transportation

equipment

• Mainframe computers

• Traffic control systems

• Gas leak detectors and automatic cutoff devices

• Rescue and security equipment

• Other safety devices and safety equipment, etc.

(3) Do not use the products covered herein for the following equipment which demands extremely

high performance in terms of functionality, reliability, or accuracy.

•

Aerospace equipment

Communications equipment for trunk lines

Control equipment for the nuclear power industry

Medical equipment related to life support, etc.

(4) Please direct all queries and comments regarding the interpretation of the above three

Paragraphs to a sales representative of the company.

•

Please direct all queries regarding the products covered herein to a sales representative of the

company.

sharp

LRS1392A

Contents

1. Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2. Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

3. Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.1 Bus Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.2 Simultaneous Operation Modes Allowed with Four Planes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4. Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5. Command Definitions for Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.1 Command Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.2 Identifier Codes and OTP Address for Read Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.3 OTP Block Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.4 Functions of Block Lock and Block Lock-Down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.5 Block Locking State Transitions upon Command Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5.6 Block Locking State Transitions upon F-WP Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6. Status Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

7. Memory Map for Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

8. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

9. Recommended DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

10. Pin Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

11. DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

12. AC Electrical Characteristics for Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.1 AC Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.2 Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.3 Write Cycle (F-WE / F-CE Controlled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.4 Block Erase, Full Chip Erase, (Page Buffer) Program and OTP Program Performance . . . . . . . . . . . . . . . . . . .

12.5 Flash Memory AC Characteristics Timing Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.6 Reset Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13. AC Electrical Characteristics for SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.1 AC Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.2 Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.3 Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.4 SRAM AC Characteristics Timing Chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14. Data Retention Characteristics for SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

15. Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

16. Flash Memory Data Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

17. Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

18. Related Document Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

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