V62C3162096L(L)
Ultra Low Power
128K x 16 CMOS SRAM
Features
• Ultra Low-power consumption
- Active: 65mA I
CC
at 35ns
- Stand-by: 10
µ
A (CMOS input/output)
2
µA
(CMOS input/output, L version)
• 35/45/55/70/85/100 ns access time
• Equal access and cycle time
• Single +2.7V to 3.3V Power Supply
• Tri-state output
• Automatic power-down when deselected
• Multiple center power and ground pins for
improved noise immunity
• Individual byte controls for both Read and
Write cycles
• Available in 44 pin TSOP II / 48-fpBGA
Functional Description
The V62C3162096L is a Low Power CMOS Static
RAM organized as 131,072 words by 16 bits. Easy
memory expansion is provided by an active LOW (CE)
and (OE) pin.
This device has an automatic power-down mode feature
when deselected. Separate Byte Enable controls (BLE
and BHE) allow individual bytes to be accessed. BLE
controls the lower bits I/O1 - I/O8. BHE controls the
upper bits I/O9 - I/O16.
Writing to these devices is performed by taking Chip
Enable (CE) with Write Enable (WE) and Byte Enable
(BLE/BHE) LOW.
Reading from the device is performed by taking Chip
Enable (CE) with Output Enable (OE) and Byte Enable
(BLE/BHE) LOW while Write Enable (WE) is held
HIGH.
Logic Block Diagram
Pre-Charge Circuit
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
Data
Cont
Data
Cont
Vcc
Vss
TSOPII / 48-fpBGA
Memory Array
1024 X 2048
I/O1 - I/O8
I/O9 - I/O16
I/O Circuit
Column Select
A10 A11 A12 A13 A14 A15 A16
WE
OE
BHE
BLE
CE
A4
A3
A2
A1
A0
CE
I/O1
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
BHE
BLE
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
NC
Row Select
1
REV. 1.1
April
2001 V62C3162096L(L)
V62C3162096L(L)
MOSEL VITELIC V62C3162096L(L)B
1
2
3
4
5
6
1
2
3
4
5
6
A
B
BLE
OE
A0
A1
A2
NC
I/O9
BHE
A3
A4
CE
I/O1
C
I/O10
I/O11
A5
A6
I/O2
I/O3
D
E
VSS
I/O12
NC
A7
I/O4
VCC
VCC
I/O13
NC
A16
I/O5
VSS
F
G
H
I/O15
I/O14
A14
A15
I/O6
I/O7
I/O16
NC
NC
A8
A12
A9
A13
A10
WE
A11
I/O8
NC
Note: NC means no Ball.
Top View
Top View
48 Ball - 9x12 fpBGA (Ultra Low Power)
C
A1
PACKAGE OUTLINE DWG.
SYMBOL
A
UNIT:MM
1.05+0.15
0.25+0.05
0.35+.05
0.30(TYP)
12.00+0.10
5.25
9.00+0.10
3.75
0.75TYP
0.10
A
aaa
SIDE VIEW
A1
b
c
D
D1
D
D1
E
6
e
E1
e
5
aaa
E1
4
3
2
1
A
B
C
D
E
F
G
H
BOTTOM VIEW
b
SOLDER BALL
2
REV. 1.1
April
2001 V62C3162096L(L)
E
V62C3162096L(L)
Absolute Maximum Ratings *
Parameter
Voltage on Any Pin Relative to Gnd
Power Dissipation
Storage Temperature (Plastic)
Temperature Under Bias
Symbol
Vt
PT
Tstg
Tbias
Minimum
-0.5
−
-55
-40
Maximum
+4.6
1.0
+150
+85
Unit
V
W
0
C
0
C
* Note:
Stresses greater than those listed above Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rat-
ing only and function operation of the device at these or any other conditions outside those indicated in the operational sections of this spec-
ification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect reliability.
Truth Table
CE
H
L
L
L
L
L
L
L
L
OE
X
L
L
L
X
X
X
H
X
WE
X
H
H
H
L
L
L
H
X
BLE BHE I/O1-I/O8 I/O9-I/O16
X
X
High-Z
High-Z
L
H
Data Out
High-Z
H
L
High-Z
Data Out
L
L
Data Out
Data Out
L
L
Data In
Data In
L
H
Data In
High-Z
H
L
High-Z
Data In
X
X
High-Z
High-Z
H
H
High-Z
High-Z
Power
Standby
Active
Active
Active
Active
Active
Active
Active
Active
Mode
Standby
Low Byte Read
High Byte Read
Word Read
Word Write
Low Byte Write
High Byte Write
Output Disable
Output Disable
* Key:
X = Don’t Care, L = Low, H = High
Recommended Operating Conditions
(T
A
= 0
0
C to +70
0
C / -40
0
C to 85
0
C**)
Parameter
Supply Voltage
Symbol
V
CC
Gnd
V
IH
V
IL
Min
2.7
0.0
2.2
-0.5*
Typ
3.0
0.0
-
-
Max
3.3
0.0
V
CC
+ 0.2
0.8
Unit
V
V
V
V
Input Voltage
*
V
IL
min = -2.0V for pulse width less than t
RC
/2.
** For Industrial Temperature
3
REV. 1.1
April
2001 V62C3162096L(L)
V62C3162096L(L)
DC Operating Characteristics
(V
cc
= 2.7 to 3.3V, Gnd = 0V, T
A
= 0
0
C to +70
0
C / -40
0
C to 85
0
C)
Parameter
Input Leakage Current
Output Leakage
Current
Operating Power
Supply Current
Average Operating
Current
Sym
Test Conditions
V
cc
= Max,
V
in
= Gnd to V
cc
CE = V
IH
or V
cc
= Max,
V
OUT
= Gnd to V
cc
CE = V
IL
, V
IN
= V
IH
or V
IL
,
I
OUT
= 0
I
OUT
= 0mA,
Min Cycle, 100% Duty
CE < 0.2V
I
OUT
= 0mA,
CE = V
IH
CE > V
cc
- 0.2V
V
IN
< 0.2V or
V
IN
> V
cc
- 0.2V
I
OL
= 2 mA
I
OH
= -2 mA
-55
-
-
-
-
-
1
1
5
50
3
-
-
-
-
-
-70
1
1
5
45
3
-
-
-
-
-
-85
1
1
5
40
3
-
-
-
-
-
-100
1
1
5
40
3
Min Max Min Max Min Max Min Max
Unit
µA
µA
I
I
LI
I
I
LO
I
CC
I
CC1
I
CC2
mA
mA
mA
Cycle Time=1µs, Duty=100%
Standby Power Supply
Current (TTL Level)
Standby Power Supply
Current (CMOS Level)
Output Low Voltage
Output High Voltage
I
SB
I
SB1
-
0.5
10
2
0.4
-
-
-
-
-
2.4
0.5
10
2
0.4
-
-
-
-
-
2.4
0.5
10
2
0.4
-
-
-
-
-
2.4
0.5
10
2
0.4
-
mA
µA
µA
L
LL
-
-
-
2.4
V
OL
V
OH
V
V
Capacitance
(f = 1MHz, T
A
= 25
o
C)
Parameter*
Input Capacitance
I/O Capacitance
Symbol
C
in
C
I/O
Test Condition
V
in
= 0V
V
in
= V
out
= 0V
Max
7
8
Unit
pF
pF
* This parameter is guaranteed by device characterization and is not production tested.
AC Test Conditions
Input Pulse Level
0.6V to 2.2V
Input Rise and Fall Time 5ns
Input and Output Timing
Reference Level
1.4V
Output Load Condition
55ns/70ns/85ns
Load for 100ns
C
L
*
TTL
C
L
= 30pf + 1TTL Load
C
L
= 100pf + 1TTL Load
Figure A.
* Including Scope and Jig Capacitance
4
REV. 1.1
April
2001 V62C3162096L(L)
V62C3162096L(L)
DC Operating Characteristics
(V
cc
= 2.7 to 3.3V, Gnd = 0V, T
A
= 0
0
C to +70
0
C / -40
0
C to 85
0
C)
Parameter
Input Leakage Current
Output Leakage
Current
Operating Power
Supply Current
Average Operating
Current
Sym
Test Conditions
-35
-45
Unit
Min Max Min Max
-
-
-
-
-
1
1
5
65
3
-
-
-
-
-
1
1
5
60
3
µA
µA
I
I
LI
I
I
LO
I
CC
I
CC1
I
CC2
V
cc
= Max,
V
in
= Gnd to V
cc
CE = V
IH
or V
cc
= Max,
V
OUT
= Gnd to V
cc
CE = V
IL
, V
IN
= V
IH
or V
IL
,
I
OUT
= 0
I
OUT
= 0mA,
Min Cycle, 100% Duty
CE < 0.2V
I
OUT
= 0mA,
CE = V
IH
CE > V
cc
- 0.2V
V
IN
< 0.2V or
V
IN
> V
cc
- 0.2V
I
OL
= 2 mA
I
OH
= -2 mA
mA
mA
mA
Cycle Time=1µs, Duty=100%
Standby Power Supply
Current (TTL Level)
Standby Power Supply
Current (CMOS Level)
Output Low Voltage
Output High Voltage
I
SB
I
SB1
-
0.5
10
2
0.4
-
-
-
-
-
2.4
0.5
10
2
0.4
-
mA
µA
µA
L
LL
-
-
-
2.4
V
OL
V
OH
V
V
5
REV. 1.1
April
2001 V62C3162096L(L)
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