DATASHEET
HIP2100
100V/2A Peak, Low Cost, High Frequency Half Bridge Driver
The
HIP2100
is a high frequency, 100V Half Bridge
N-Channel power MOSFET driver IC. The low-side and
high-side gate drivers are independently controlled and
matched to 8ns. This gives the user maximum flexibility in
dead-time selection and driver protocol. Undervoltage
protection on both the low-side and high-side supplies force
the outputs low. An on-chip diode eliminates the discrete
diode required with other driver ICs. A new level-shifter
topology yields the low-power benefits of pulsed operation
with the safety of DC operation. Unlike some competitors,
the high-side output returns to its correct state after a
momentary undervoltage of the high-side supply.
FN4022
Rev.16.00
Aug 8, 2019
Features
• Drives N-Channel MOSFET Half Bridge
• SOIC, EPSOIC, and QFN Package Options
• SOIC and EPSOIC Packages Compliant with 100V
Conductor Spacing Guidelines of IPC-2221
• Pb-Free (RoHS Compliant)
• Bootstrap Supply Max Voltage to 114VDC
• On-Chip 1Ω Bootstrap Diode
• Fast Propagation Times for Multi-MHz Circuits
• Drives 1000pF Load with Rise and Fall Times Typ 10ns
• CMOS Input Thresholds for Improved Noise Immunity
• Independent Inputs for Non-Half Bridge Topologies
• No Start-Up Problems
• Outputs Unaffected by Supply Glitches, HS Ringing Below
Ground, or HS Slewing at High dv/dt
• Low Power Consumption
• Wide Supply Range
• Supply Undervoltage Protection
• 3Ω Driver Output Resistance
• QFN Package:
- Compliant to JEDEC PUB95 MO-220
QFN - Quad Flat No Leads - Package Outline
- Near Chip Scale Package Footprint, which Improves
PCB Efficiency and has a Thinner Profile
Applications
• Telecom Half Bridge Power Supplies
• Avionics DC/DC Converters
• Two-Switch Forward Converters
• Active Clamp Forward Converters
Related Literature
For a full list of related documents, visit our website:
•
HIP2100
device page
FN4022 Rev.16.00
Aug 8, 2019
Page 1 of 14
HIP2100
Ordering Information
PART NUMBER
(Notes
2, 3)
HIP2100IBZ
HIP2100IBZT
HIP2100EIBZ
HIP2100EIBZT
HIP2100IRZ
HIP2100IRZT
HIP2100EVAL2
NOTES:
1. See
TB347
for details about reel specifications.
2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J-STD-020.
3. For Moisture Sensitivity Level (MSL), see the
HIP2100
device page. For more information about MSL, see
TB363.
PART
MARKING
2100 IBZ
2100 IBZ
2100 EIBZ
2100 EIBZ
HIP 2100IRZ
HIP 2100IRZ
Evaluation Board
TEMP. RANGE
(°C)
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
TAPE AND REEL
(Units) (Note
1)
-
2.5k
-
2.5k
-
6k
PACKAGE
(RoHS Compliant)
8 Ld SOIC
8 Ld SOIC
8 Ld EPSOIC
8 Ld EPSOIC
16 Ld 5x5 QFN
16 Ld 5x5 QFN
PKG.
DWG. #
M8.15
M8.15
M8.15C
M8.15C
L16.5x5
L16.5x5
Pinouts
(8 LD SOIC, EPSOIC)
TOP VIEW
V
DD
HB
HO
HS
1
2
3
4
EPAD
8
7
6
5
LO
V
SS
LI
HI
NC 1
HB 2
EPAD
HO 3
NC 4
5
NC
6
HS
7
HI
8
NC
(16 LD QFN)
TOP VIEW
V
DD
NC
NC
13
12 NC
11 V
SS
10 LI
9
NC
LO
14
16
15
EPAD = Exposed PAD.
Pin Descriptions
SYMBOL
V
DD
HB
HO
HS
HI
LI
V
SS
LO
EPAD
DESCRIPTION
Positive Supply to lower gate drivers. De-couple this pin to V
SS
. Bootstrap diode connected to HB.
High-Side Bootstrap supply. External bootstrap capacitor is required. Connect positive side of bootstrap capacitor to this pin.
Bootstrap diode is on-chip.
High-Side Output. Connect to gate of High-Side power MOSFET.
High-Side Source connection. Connect to source of High-Side power MOSFET. Connect negative side of bootstrap capacitor to
this pin.
High-Side input.
Low-Side input.
Chip negative supply, generally will be ground.
Low-Side Output. Connect to gate of Low-Side power MOSFET.
Exposed Pad. Connect to ground or float. The EPAD is electrically isolated from all other pins.
FN4022 Rev.16.00
Aug 8, 2019
Page 2 of 14
HIP2100
Application Block Diagram
+12V
+100V
V
DD
HB
SECONDARY
CIRCUIT
HI
CONTROL
PWM
CONTROLLER
LI
DRIVE
HI
HO
HS
DRIVE
LO
LO
HIP2100
V
SS
REFERENCE
AND
ISOLATION
Functional Block Diagram
HB
V
DD
UNDER
VOLTAGE
LEVEL SHIFT
DRIVER
HS
HI
HO
UNDER
VOLTAGE
DRIVER
LI
V
SS
LO
EPAD (EPSOIC and QFN PACKAGES ONLY)
*EPAD = Exposed Pad. The EPAD is electrically isolated from all other pins. For best
thermal performance connect the EPAD to the PCB power ground plane.
FN4022 Rev.16.00
Aug 8, 2019
Page 3 of 14
HIP2100
+48V
+12V
PWM
HIP2100
SECONDARY
CIRCUIT
ISOLATION
FIGURE 1. TWO-SWITCH FORWARD CONVERTER
+48V
+12V
SECONDARY
CIRCUIT
PWM
HIP2100
ISOLATION
FIGURE 2. FORWARD CONVERTER WITH AN ACTIVE CLAMP
FN4022 Rev.16.00
Aug 8, 2019
Page 4 of 14
HIP2100
Absolute Maximum Ratings
Supply Voltage, V
DD,
V
HB
-V
HS
(Notes
4, 5)
. . . . . . . . -0.3V to 18V
LI and HI Voltages (Note
5)
. . . . . . . . . . . . . . . . -0.3V to V
DD
+0.3V
Voltage on LO (Note
4)
. . . . . . . . . . . . . . . . . . . -0.3V to V
DD
+0.3V
Voltage on HO (Note
4)
. . . . . . . . . . . . . . . V
HS
-0.3V to V
HB
+0.3V
Voltage on HS (Continuous) (Note
4)
. . . . . . . . . . . . . . -1V to 110V
Voltage on HB (Note
4)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . +118V
Average Current in V
DD
to HB diode . . . . . . . . . . . . . . . . . . . 100mA
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 (1kV)
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
95
50
SOIC (Note
6)
. . . . . . . . . . . . . . . . . . .
EPSOIC (Note
7)
. . . . . . . . . . . . . . . . .
40
3.0
QFN (Note
7)
. . . . . . . . . . . . . . . . . . . .
37
6.5
Max Power Dissipation at +25°C in Free Air (SOIC,
Note 6)
. . . . 1.3W
Max Power Dissipation at +25°C in Free Air (EPSOIC,
Note 7).
. 3.1W
Max Power Dissipation at +25°C in Free Air (QFN,
Note 7)
. . . . . 3.3W
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature Range. . . . . . . . . . . . . . . . . .-55°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
Maximum Recommended Operating Conditions
Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . +9V to 14.0VDC
Voltage on HS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to 100V
Voltage on HS. . . . . . . . . . . . . . . .(Repetitive Transient) -5V to 105V
Voltage on HB . . . V
HS
+8V to V
HS
+14.0V and V
DD
-1V to V
DD
+100V
HS Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <50V/ns
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions can adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
4. The HIP2100 is capable of derated operation at supply voltages exceeding 14V.
Figure 16 on page 9
shows the high-side voltage derating curve
for this mode of operation.
5. All voltages referenced to V
SS
unless otherwise specified.
6.
JA
is measured with the component mounted on a high-effective thermal conductivity test board in free air. See
TB379
for details.
7.
JA
is measured in free air with the component mounted on a high-effective thermal conductivity test board with “direct attach” features.
JC,
the
“case temp” is measured at the center of the exposed metal pad on the package underside. See
TB379
for details.
Electrical Specifications
V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO, unless otherwise specified.
T
J
= +25°C
T
J
= -40°C TO +125°C
MIN
(Note
8)
MAX
(Note
8)
UNIT
PARAMETERS
SUPPLY CURRENTS
V
DD
Quiescent Current
V
DD
Operating Current
Total HB Quiescent Current
Total HB Operating Current
HB to V
SS
Current, Quiescent
HB to V
SS
Current, Operating
INPUT PINS
Low Level Input Voltage Threshold
High Level Input Voltage Threshold
Input Voltage Hysteresis
Input Pulldown Resistance
UNDERVOLTAGE PROTECTION
V
DD
Rising Threshold
V
DD
Threshold Hysteresis
HB Rising Threshold
HB Threshold Hysteresis
SYMBOL
TEST CONDITIONS
MIN TYP MAX
I
DD
I
DDO
I
HB
I
HBO
I
HBS
I
HBSO
LI = HI = 0V
f = 500kHz
LI = HI = 0V
f = 500kHz
V
HS
= V
HB
= 114V
f = 500kHz
-
-
-
-
-
-
0.1
1.5
0.1
1.5
0.05
0.7
0.15
2.5
0.15
2.5
1
-
-
-
-
-
-
-
0.2
3
0.2
3
10
-
mA
mA
mA
mA
µA
mA
V
IL
V
IH
V
IHYS
R
I
4
-
-
-
5.4
5.8
0.4
200
-
7
-
-
3
-
-
100
-
8
-
500
V
V
V
kΩ
V
DDR
V
DDH
V
HBR
V
HBH
7
-
6.5
-
7.3
0.5
6.9
0.4
7.8
-
7.5
-
6.5
-
6
-
8
-
8
-
V
V
V
V
FN4022 Rev.16.00
Aug 8, 2019
Page 5 of 14
京公网安备 11010802033920号
EEWORLD
