P89LPC952/954
8-bit microcontroller with accelerated two-clock 80C51 core
8 kB/16 kB 3 V byte-erasable flash with 10-bit ADC
Rev. 04 — 24 July 2008
Product data sheet
1. General description
The P89LPC952/954 is a single-chip microcontroller, available in low cost packages,
based on a high performance processor architecture that executes instructions in two to
four clocks, six times the rate of standard 80C51 devices. Many system-level functions
have been incorporated into the P89LPC952/954 in order to reduce component count,
board space, and system cost.
2. Features
2.1 Principal features
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8 kB/16 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte
pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
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256-byte RAM data memory and a 256-byte auxiliary on-chip RAM.
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8-input multiplexed 10-bit ADC with window comparator that can generate an interrupt
for in or out of range results. Two analog comparators with selectable inputs and
reference source.
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Two 16-bit counter/timers (each may be configured to toggle a port output upon timer
overflow or to become a PWM output) and a 23-bit system timer that can also be used
as a RTC.
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Two enhanced UARTs with a fractional baud rate generator, break detect, framing
error detection, and automatic address detection; 400 kHz byte-wide I
2
C-bus
communication port and SPI communication port.
I
High-accuracy internal RC oscillator option, with clock doubler option, allows operation
without external oscillator components. The RC oscillator option is selectable and fine
tunable. Fast switching between the internal RC oscillator and any oscillator source
provides optimal support of minimal power active mode with fast switching to
maximum performance.
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2.4 V to 3.6 V V
DD
operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
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44-pin and 48-pin packages with 40 and 42 I/O pins minimum while using on-chip
oscillator and reset options.
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Port 5 has high current sourcing/sinking (20 mA) for all Port 5 pins. All other port pins
have high sinking capability (20 mA). A maximum limit is specified for the entire chip.
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Watchdog timer with separate on-chip oscillator, requiring no external components.
The watchdog prescaler is selectable from eight values.
NXP Semiconductors
P89LPC952/954
8-bit microcontroller with 10-bit ADC
2.2 Additional features
I
A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
for all instructions except multiply and divide when executing at 18 MHz. This is six
times the performance of the standard 80C51 running at the same clock frequency. A
lower clock frequency for the same performance results in power savings and reduced
EMI.
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Serial flash In-Circuit Programming (ICP) allows simple production coding with
commercial EPROM programmers. Flash security bits prevent reading of sensitive
application programs.
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Serial flash In-System Programming (ISP) allows coding while the device is mounted
in the end application.
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In-Application Programming (IAP) of the flash code memory. This allows changing the
code in a running application.
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Low voltage (brownout) detect allows a graceful system shutdown when power fails.
May optionally be configured as an interrupt.
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Idle and two different power-down reduced power modes. Improved wake-up from
Power-down mode (a LOW interrupt input starts execution). Typical power-down
current is 1
µA
(total power-down with voltage comparators disabled).
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On-chip power-on reset allows operation without external reset components. A
software reset function is also available.
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Programmable external reset pin (P1.5) configuration options: open drain bidirectional
reset input/output, reset input with pull-up, push-pull reset output, input-only port. A
reset counter and reset glitch suppression circuitry prevent spurious and incomplete
resets.
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Only power and ground connections are required to operate the P89LPC952/954
when internal reset option is selected.
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Configurable on-chip oscillator with frequency range options selected by user
programmed flash configuration bits. Oscillator options support frequencies from
20 kHz to the maximum operating frequency of 18 MHz.
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Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
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Programmable port output configuration options: quasi-bidirectional, open drain,
push-pull, input-only.
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Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
the pins match or do not match a programmable pattern.
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Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
minimum ramp times.
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Four interrupt priority levels.
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Eight keypad interrupt inputs, plus two additional external interrupt inputs.
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Schmitt trigger port inputs.
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Second data pointer.
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Extended temperature range.
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Emulation support.
P89LPC952_954_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 24 July 2008
2 of 69
NXP Semiconductors
P89LPC952/954
8-bit microcontroller with 10-bit ADC
3. Ordering information
Table 1.
Ordering information
Package
Name
P89LPC952FA
P89LPC952FBD
P89LPC954FA
P89LPC954FBD44
P89LPC954FBD48
PLCC44
LQFP44
PLCC44
LQFP44
LQFP48
Description
plastic leaded chip carrier; 44 leads
plastic low profile quad flat package; 44 leads;
body 10
×
10
×
1.4 mm
plastic leaded chip carrier; 44 leads
plastic low profile quad flat package; 44 leads;
body 10
×
10
×
1.4 mm
plastic low profile quad flat package; 48 leads;
body 7
×
7
×
1.4 mm
Version
SOT187-2
SOT389-1
SOT187-2
SOT389-1
SOT313-2
Type number
3.1 Ordering options
Table 2.
Ordering options
Flash memory
8 kB
8 kB
16 kB
16 kB
16 kB
Temperature range
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
Frequency
0 MHz to 18 MHz
0 MHz to 18 MHz
0 MHz to 18 MHz
0 MHz to 18 MHz
0 MHz to 18 MHz
Type number
P89LPC952FA
P89LPC952FBD
P89LPC954FA
P89LPC954FBD44
P89LPC954FBD48
P89LPC952_954_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 24 July 2008
3 of 69
NXP Semiconductors
P89LPC952/954
8-bit microcontroller with 10-bit ADC
4. Block diagram
P89LPC952/954
ACCELERATED 2-CLOCK 80C51 CPU
8 kB/16 kB
CODE FLASH
256-BYTE
DATA RAM
256-BYTE
AUXILIARY RAM
internal
bus
UART0
TXD0
RXD0
TXD1
RXD1
SCL
SDA
AD00
AD01
AD03
AD05
AD07
UART1
I
2
C-BUS
P5[7:0]
PORT 5
CONFIGURABLE I/Os
PORT 4
CONFIGURABLE I/Os
PORT 3
CONFIGURABLE I/Os
PORT 2
CONFIGURABLE I/Os
PORT 1
CONFIGURABLE I/Os
PORT 0
CONFIGURABLE I/Os
AD02
ADC0
AD04
AD06
SPICLK
MOSI
MISO
SS
P4[7:0]
P3[1:0]
P2[5:0]
(1)
P2[7:0]
(2)
P1[7:0]
SPI
REAL-TIME CLOCK/
SYSTEM TIMER
TIMER 0
TIMER 1
T0
T1
CMP2
ANALOG
COMPARATORS
CIN2A
CIN1A
CIN2B
CMP1
CIN1B
P0[7:0]
KEYPAD
INTERRUPT
WATCHDOG TIMER
AND OSCILLATOR
DEBUGGER
INTERFACE
TRIG
TCLK
TDI
PROGRAMMABLE
OSCILLATOR DIVIDER
XTAL1
CRYSTAL
OR
RESONATOR XTAL2
CPU
clock
ON-CHIP RC
OSCILLATOR WITH
CLOCK DOUBLER
POWER MONITOR
(POWER-ON RESET,
BROWNOUT RESET)
CONFIGURABLE
OSCILLATOR
002aab305
(1) 44-pin package.
(2) 48-pin package.
Fig 1.
Block diagram
P89LPC952_954_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 24 July 2008
4 of 69
NXP Semiconductors
P89LPC952/954
8-bit microcontroller with 10-bit ADC
5. Functional diagram
V
DD
V
SS
AD05
AD00
AD01
AD02
AD03
KBI0
KBI1
KBI2
KBI3
KBI4
KBI5
KBI6
KBI7
CLKOUT
CMP2
CIN2B
CIN2A
CIN1B
CIN1A
CMPREF
CMP1
T1
XTAL2
PORT 0
PORT 1
TXD0
RXD0
T0
INT0
INT1
RST
AD04
AD07
AD06
MOSI
MISO
SS
SPICLK
SCL
SDA
PORT 3
XTAL1
P89LPC952
P89LPC954
(1)
(1)
PORT 2
PORT 5
TRIG
TXD1
RXD1
TDI
TCLK
002aab358
PORT 4
(1) 48-pin package.
Fig 2.
Functional diagram
P89LPC952_954_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 24 July 2008
5 of 69
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