EEWORLDEEWORLDEEWORLD

Part Number

Search

530EC711M000DGR

Description
LVPECL Output Clock Oscillator, 711MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

530EC711M000DGR Overview

LVPECL Output Clock Oscillator, 711MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530EC711M000DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instructionROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability7%
JESD-609 codee4
Manufacturer's serial number530
Installation featuresSURFACE MOUNT
Nominal operating frequency711 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
【TI store promotion】CC2640R2 and more popular new Bluetooth products 10% off or free shipping
[size=3] A year's plan begins in spring, April is a good month for "wireless" products! April "wireless" discounts are on! [/size][size=3][color=Red][size=3][color=Red][color=Black]Don't miss it if yo...
EEWORLD社区 TI Technology Forum
[Question] Why is there no response to the 1394 asynchronous write request?
When I send a 4-byte write request to the SONY camera with 1394 interface, there is no response. However, there is a response to the read request, and the data to be read is returned. I have carefully...
weison86620 Embedded System
Can the forum give out some prizes of outdoor sports equipment?
Seeing that little Japanese prize included a Camppal tent that opens automatically in one minute and a Victorinox Swiss Army Knife, I can't help but feel passive. Alas, willpower is easily affected. [...
wangfuchong Talking
This is a board made with Spartan-6 chips. Please take a look at it first.
Currently there are only silk screen pictures, enjoy them first.I don't know if anyone has done it in the forum, share it with you [[i] This post was last edited by gauson on 2009-12-16 11:00 [/i]]...
gauson FPGA/CPLD
Why use CPLD or FPGA?
I want to expand an AD chip for DSP, and the sampling rate is required to be about 10M. I see many people on the Internet use FPGA or CPLD for external AD. But if the AD is a parallel port, then the d...
mrwoshishei FPGA/CPLD
Starting with the Camera - Introduction to Advanced Driver Assistance System Solutions Series
In recent years, with the continuous improvement of people's demand for driving safety, the continuous maturity of advanced driver assistance system (ADAS) related technologies, and the rapid developm...
zqy1111 TI Technology Forum

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2924  2282  1190  660  2676  59  46  24  14  54 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号