PROTECTION PRODUCTS - RailClamp
®
Description
The RailClamp
®
series consists of ultra low capacitance
TVS arrays designed to protect high speed data inter-
faces. This series has been specifically designed to
protect sensitive components which are connected to
high-speed data and transmission lines from overvoltage
caused by
ESD
(electrostatic discharge),
CDE
(Cable
Discharge Events), and
EFT
(electrical fast transients).
They are designed for use in applications where board
space is at a premium. Each device requires less than
2.9mm
2
of PCB area and will protect two high speed
data lines.
The monolithic design incorporates surge rated, low
capacitance steering diodes and a TVS diode in a single
package. Each line has a typical capacitance of 0.9pF to
ground and 0.3pF between lines. The capacitance of
each line is well matched for consistant signal balance.
Signal integrity is further preserved with the flow through
design. A connection to the TVS is provided for protec-
tion of external voltage busses, such as those found in
USB applications. This device is optimized for ESD
protection of portable electronics. They may be used to
meet the ESD immunity requirements of IEC 61000-4-2,
Level 4 (±15kV air, ±8kV contact discharge).
The RClamp0502A is in a 6-pin, RoHS/WEEE compli-
ant, SC-89 (SOT-666) package. It measures 1.6 x 1.6
x 0.6mm. The leads are finished with lead-free matte
tin. The small package makes it ideal for use in por-
table electronics such as cell phones, laptops, and
digital still cameras.
RailClamp
®
Low Capacitance TVS Array
Features
Transient protection for high-speed data lines to
IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
Flow through design for ease of layout for high
speed data line application
Protects up to two I/O lines & power line
Low capacitance
(<0.9pF)
for high-speed interfaces
Ultra-small package requires less than 2.9mm
2
of
PCB area
Low leakage current and clamping voltage
Low operating voltage: 5.0V
Solid-state silicon-avalanche technology
RClamp0502A
Mechanical Characteristics
SC-89 (SOT-666) package
RoHS/WEEE Compliant
Lead Finish: matte tin
Molding compound flammability rating: UL 94V-0
Marking: A
Packaging: Tape and Reel
Applications
USB 2.0 High Speed
10/100/1000 Ethernet Ports
High-Definition Multimedia Interface (HDMI)
Digital Visual Interface (DVI)
Monitors and Flat Panel Displays
Video Graphics Cards
IEEE 1394 Firewire Ports High Speed
Circuit Diagram
Schematic & PIN Configuration
Pin 5
1
Pin 3 & 4
Pin 1 & 6
6
5
4
2
3
Pin 2
SC-89 6L (Top View)
Revision 06/28/2008
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RClamp0502A
PROTECTION PRODUCTS
Absolute Maximum Rating
R ating
Peak Pulse Power (tp = 8/20
μ
s)
Peak Pulse Current (tp = 8/20
μ
s)
ESD p er IEC 61000-4-2 (Air)
1
ESD p er IEC 61000-4-2 (Contact)
Op erating Temp erature
Storage Temp erature
Note 1: Between any I/O and GND
Symbol
P
p k
I
P P
V
ESD
T
J
T
STG
Value
50
3
±20
±15
-55 to +125
-55 to +150
Units
Watts
A
kV
°C
°C
Electrical Characteristics (T=25
o
C)
Parameter
Reverse Stand-Of f Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Symbol
V
RWM
V
BR
I
R
Conditions
Between I/O lines to Gnd or
I/O to I/O
I
t
= 1mA
Between I/O lines to Gnd
V
RWM
= 5V, T=25°C
Between I/O lines to Gnd or
I/O to I/O
I
PP
= 1A, tp = 8/20
μ
s
Between I/O lines to Gnd
I
PP
= 3A, tp = 8/20
μ
s
Between I/O to Gnd
I
PP
= 3A, tp = 8/20
μ
s
Between I/O to I/O
V
R
= 0V, f = 1MHz
Between I/O to Gnd
V
R
= 0V, f = 1MHz
Between I/O to I/O
0.3
6
1
Minimum
Typical
Maximum
5
Units
V
V
μ
A
Clamping Voltage
Clamping Voltage
Clamping Voltage
V
C
V
C
V
C
14
16
18
0.9
0.7
V
V
V
pF
pF
Junction Capacitance
Junction Capacitance
C
j
C
j
©
2008 Semtech Corp.
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RClamp0502A
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10
Peak Pulse Power - P
PP
(kW)
110
100
% of Rated Power or I
PP
90
80
70
60
50
40
30
20
10
Power Derating Curve
1
0.1
0.01
0.1
1
10
Pulse Duration - tp (µs)
100
1000
0
0
25
50
75
100
o
125
150
Ambient Temperature - T
A
( C)
Clamping Voltage vs. Peak Pulse Current
I/O to Gnd - Pin 1, 3, 4, 6 to Pin 2
16
14
Clamping Voltage - V
C
(V)
Clamping Voltage - V
C
(V)
12
10
8
6
4
2
0
0
1
2
Peak Pulse Current - I
PP
(A)
3
4
15
20
Clamping Voltage vs. Peak Pulse Current
I/O to I/O
10
Waveform
Parameters:
tr = 8µs
td = 20µs
5
Waveform
Parameters:
tr = 8µs
td = 20µs
0
1
2
Peak Pulse Current - Ipp (A)
3
4
0
Normalized Capacitance vs. Reverse Voltage
I/O to Gnd - Pin 1, 3, 4, or 6 to Pin 2
1.4
NormalizedCapacitance - C
j
1.2
1
0.8
0.6
0.4
0.2
Normalized Capacitance vs. Reverse Voltage
I/O to I/O
1.2
f = 1 MHz
Normalized Capacitance - C
j
1
0.8
0.6
0.4
f = 1 MHz
0
0
1
2
3
Reverse Voltage - V
R
(V)
4
5
0.2
0
1
2
3
Reverse Voltage - V
R
(V)
4
5
©
2008 Semtech Corp.
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RClamp0502A
PROTECTION PRODUCTS
Typical Characteristics
Insertion Loss S21 (I/O to I/O)
CH1 S21
LOG
6 dB / REF 0 dB
1: .03430 dB
900 MHz
2: .07870 dB
1.8 GHz
3: .28040 dB
2.5 GHz
0 dB
1
2
1
2
Insertion Loss S21 (I/O to Gnd)
CH1 S21
LOG
6 dB / REF 0 dB
1: .00460 dB
900 MHz
2: .02010 dB
1.8 GHz
3: -.08180 dB
2.5 GHz
3
3
0 dB
-6 dB
-12 dB
-18 dB
-24 dB
-30 dB
-36 dB
1
MHz
START . 030 MHz
10
MHz
100
MHz
3
1
GHz GHz
STOP 3000. 000000 MHz
-6 dB
-12 dB
-18 dB
-24 dB
-30 dB
-36 dB
1
MHz
START . 030 MHz
10
MHz
100
MHz
3
1
GHz GHz
STOP 3000. 000000 MHz
ESD Response (4kV Contact per IEC 61000-4-2)
ESD Response (8kV Contact per IEC 61000-4-2)
Note: Data is taken with a 10x attenuator
Note: Data is taken with a 10x attenuator
©
2008 Semtech Corp.
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RClamp0502A
PROTECTION PRODUCTS
Applications Information
Device Connection Options for Protection of Two
High-Speed Data Lines
This device is designed to protect data lines by
clamping them to a fixed reference. When the voltage
on the protected line exceeds the reference voltage
the steering diodes are forward biased, conducting the
transient current away from the sensitive circuitry.
Data lines are connected at pins 1 & 6 and pins 3 & 4.
Pins 5 and 2 can be connected to ground or Vcc based
on application and location of those connections. The
connection to ground should be made directly to a
ground plane. The path length should also be kept as
short as possible to minimize parasitic inductance.
Figure 1 shows the layout configuration to send data
input at pins 6 and 4 and output at pins 1 and 3.
This device is designed for ease of PCB layout by
allowing the traces run straight through the device.
Figure 2 shows the proper way to design the PCB
board trace in order to use the flow through layout for
two line pairs. The solid line represents the PCB trace.
Note the PCB traces are used to connect the pin pairs
for each I/O (pin 1 to pin 6 and pins 3 to pin 4). For
example, I/O 1 enters at pin 6 and exits at pin 1 and
the PCB trace connects pins 6 and 1 together. This is
also true for I/O 2. The negative reference (Gnd) is
connected at pin 2. The positive reference is
connected at pin 5.
Universal Serial Bus ESD Protection
The RClamp0502A may also be used to protect both
upstream and downstream USB ports on monitors,
computers, peripherals or portable systems. Each
device will protect up to one USB port (Figure 3). When
the voltage on the data lines exceed the bus voltage
(plus one diode drop), the internal rectifiers are
forward biased conducting the transient current away
from the protected controller chip. The TVS diode
directs the surge to ground. The TVS diode also acts
to suppress ESD strikes directly on the voltage bus.
Thus, both power and data pins are protected with a
single device.
Figure 1. Protection of Two Data Lines
and One Power Supply Line
Figure 2. Flow Through Layout for
Two Data Lines and one Power Line
Figure 3. USB 2.0 (up to 480Mbps)
Upstream or Downstream Port Protection
D+
to protected Circuit
Gnd
D-
to protected Circuit
1
2
3
6
5
4
D+
Vcc
D-
©
2008 Semtech Corp.
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