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FPLD52TE1

Description
3.3V SURFACE MOUNT CLOCK OSCILLATOR
File Size212KB,2 Pages
ManufacturerConnor-Winfield
Websitehttp://www.conwin.com/
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FPLD52TE1 Overview

3.3V SURFACE MOUNT CLOCK OSCILLATOR

THE CONNOR-WINFIELD CORP.
2111 COMPREHENSIVE DRIVE.
AURORA, IL 60505.
FAX (630) 581-5040.
PHONE (630) 851-4722.
www.conwin.com
PRODUCT
D ATA
SHEET
CRYSTAL CONTROLLED OSCILLATORS
3.3V SURFACE MOUNT CLOCK OSCILLATOR
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Storage Temperature
Supply Voltage
(Vcc)
UNITS
MINIMUM
-40
-0.5
NOMINAL
-
-
MAXIMUM
85
7.0
UNITS
°C
Vdc
TABLE 2.0
MINIMUM
NOMINAL
341.20000
400.00000
622.08000
644.51000
644.53125
666.51430
669.32660
-
-
3.3
-
-
-
-60
-90
-130
-135
MAXIMUM
UNITS
NOTE
TABLE 1.0
NOTE
CW 0701
FPLD52TE1
622.08M
FPLD52TE1
DESCRIPTION
OPERATING SPECIFICATIONS
PARAMETER
Center Frequency
Total Frequency Tolerance
Operating Temperature Range
Supply Voltage
Supply Current
Jitter (BW=10Hz to 20MHz)
Jitter (BW=12kHz to 80MHz)
SSB Phase Noise at 100Hz offset
SSB Phase Noise at 1KHz offset
SSB Phase Noise at 10KHz offset
SSB Phase Noise at 100KHz offset
(Fo)
-
-50
0
-
50
70
3.465
100
5
1
-
-
-
-
MHz
ppm
°C
Vdc
mA
ps rms
ps rms
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
1
(Vcc)
(Icc)
3.135
-
-
-
-
-
-
-
The Connor-Winfield
FPLD52TE1 is a 3.3V Clock
Oscillator (XO) with
Differential LVPECL outputs
and Enable/Disable function.
The FPLD52TE1 is designed
for use with applications
requiring low jitter and tight
stability. No multiplication
schemes are used in this
oscillator design.
INPUT CHARACTERISTICS
PARAMETER
Enable Input Voltage (Low)
Disable Input Voltage (High)
(Vil)
(Vih)
MINIMUM
-
2.275
NOMINAL
MAXIMUM
1.68
-
UNITS
Vdc
Vdc
TABLE 3.0
NOTE
2
2
FEATURES
LOW PROFILE, SURFACE MOUNT
PACKAGE
3.3V OPERATION
-
-
LOW VOLTAGE PECL OUTPUT
CHARACTERISTICS
PARAMETER
LOAD
Voltage
(High)
(Low)
Duty Cycle at 50% Level
Rise / Fall Time 20% to 80%
(Voh)
(Vol)
MINIMUM
-
2.275
-
45
-
NOMINAL
-
-
-
50
-
MAXIMUM
50
-
1.68
55
1
UNITS
Ohms
Vdc
Vdc
%
nS
TABLE 4.0
NOTE
3
LOW JITTER <1pS RMS
FREQUENCY TOLERANCE: ±50ppm
TEMPERATURE RANGE 0 to 70°C
DIFFERENTIAL LVPECL OUTPUTS
ENABLE / DISABLE FUNCTION
TAPE AND REEL PACKAGING
PACKAGE CHARACTERISTICS
Package
TABLE 5.0
Non-hermetic package consisting of an FR4 subs trate with grounded metal
cover.
PROCESS
RECOMMENDATIONS
Solder Reflow
Wash
Notes
1.0
2.0
3.0
TABLE 6.0
The component solder used internal to this device has a m elting point of
221°C. The peak temperature inside the device should be less t han or equal
to 220°C for a maximum of 10 seconds
Ultrasonic cleaning is not recommended.
ORDERING INFORMATION
FPLD52TE1 - 622.08MHz
Inclusive of calibration @ 25°C, frequency stabilit y vs. temperature, supply and load variations, shock, vibrat ion and aging
for ten years. Control voltage (Vc) = 1.65 Vdc.
When oscillator is disabled the true output is in a low state (Vol) and the complementary output is in the high stat e (VoH).
Outputs are enabled with no connection on enable pad.
50 ohm termination into Vcc -2V or Thevein equivalent.
LVPECL
CLOCK
SERIES
CENTER
FREQUENCY
Specifications subject to change without notice.
DATA SHEET #:
Ec181
PAGE
1
OF
2
REV:
01
DATE:
8/4/03
a
Copyright 2001 Connor-Winfield all rights reserved.

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