F75111R datasheet, PDF - EEWORLD Datasheet

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F75111R: DescriptionLow Power GPIO Datasheet; File Size968KB，45 Pages; ManufacturerFINTEK; Websitehttp://www.fintek.com.tw/eng/

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Low Power GPIO Datasheet

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F75111

F75111R/F75111RG/F75111N

Low Power GPIO Datasheet

Release Date: July, 2007

Revision: V0.27P

July 2007

F75111

F75111 Datasheet Revision History

Version

0.20P

0.21P

0.22P

Date

01/04/2003

09/04/2003

02/06/2003

6~8

7~8

38~39

Page

Revision History

Internal Use Preliminary Public Version

Add F75111N pin configuration and description

(1) Revised pin description of LED function

(2) Revised electron characteristic(operating temperature)

(3) Revised DC spec (Input high/low leakage current)

0.23P

0.24P

0.25P

0.26P

0.27P

12/29/2003

4/26/2004

1/12/2005

7/14/2005

7/5/2007

21,28

7,8

8,9

36,39

Update register description( Index 0x18, 0x28)

Update pin description of GPIO pin

Revise SMBus access timing

Modify

AC Characteristics and delete version ID register

Add company address

Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies

mentioned in this data sheet belong to their respective owners.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can

reasonably be expected to result in personal injury. Customers using or selling these products for use in such applications do so

at their own risk and agree to fully indemnify Fintek for any damages resulting from such improper use or sales.

July 2007

F75111

Table of Contents

1. GENERAL DESCRIPTION .......................................................................................................................................- 4 -

2. FEATURES................................................................................................................................................................- 4 -

3. KEY SPECIFICATIONS ............................................................................................................................................- 4 -

4. PIN CONFIGURATION .............................................................................................................................................- 5 -

5. PIN DESCRIPTION ...................................................................................................................................................- 6 -

5.1 P

OWER

........................................................................................................................................................ - 6 -

5.2 GPIO F

UNCTION

................................................................................................................................................ - 6 -

6. FUNCTIONAL DESCRIPTION..................................................................................................................................- 8 -

6.1 G

ENERAL

ESCRIPTION

...................................................................................................................................... - 8 -

6.2 A

CCESS

NTERFACE

............................................................................................................................................ - 8 -

6.3 T

SMB

US ACCESS TIMING ARE SHOWN AS FOLLOW

: .......................................................................................... - 8 -

7. REGISTERS DESCRIPTION ....................................................................................................................................- 9 -

7.1 C

ONFIGURATION AND

ONTROL

EGISTER

– I

NDEX

....................................................................................... - 9 -

7.2 S

TATUS

EGISTER

– I

NDEX

........................................................................................................................ - 10 -

7.3 C

ONFIGURATION AND FUNCTION SELECT

EGISTER

– I

NDEX

......................................................................... - 10 -

7.4 P

IN MODE FUNCTION SELECT

EGISTER

– I

NDEX

......................................................................................... - 11 -

7.5 P

IN MODE FUNCTION SELECT

EGISTER

– I

NDEX

......................................................................................... - 11 -

7.6 LED F

REQ

ONTROL

EGISTER

– I

NDEX

.................................................................................................... - 12 -

7.7 LED F

REQ

ONTROL

EGISTER

– I

NDEX

.................................................................................................... - 13 -

7.8 LED F

REQ

ONTROL

EGISTER

– I

NDEX

.................................................................................................... - 13 -

7.9 LED F

REQ

ONTROL

EGISTER

– I

NDEX

.................................................................................................... - 14 -

7.10 GPIO1

UTPUT

ONTROL

EGISTER

– I

NDEX

........................................................................................ - 15 -

7.11 GPIO1

UTPUT

ATA

EGISTER

– I

NDEX

................................................................................................ - 16 -

7.12 GPIO1

NPUT

TATUS

EGISTER

– I

NDEX

............................................................................................... - 16 -

7.13 GPIO1

EVEL

ULSE

ONTROL

EGISTER

– I

NDEX

................................................................................ - 17 -

7.14 GPIO1

ULSE

IDTH

ONTROL

EGISTER

– I

NDEX

................................................................................ - 17 -

7.15 GPIO1

ULL

ESISTOR

ONTROL

EGISTER

– I

NDEX

........................................................................ - 18 -

7.16 GPIO1

NPUT

BOUNCE

EGISTER

– I

NDEX

........................................................................................ - 18 -

7.17 GPIO1

ULSE

NVERSE

EGISTER

– I

NDEX

............................................................................................ - 19 -

7.18 GP1X E

DGE

ETECTOR

NABLE

EGISTER

– I

NDEX

18 ............................................................................... - 19 -

7.19 GP1X E

DGE

ETECTOR

TATUS

EGISTER

– I

NDEX

19 ............................................................................... - 20 -

7.20 GP1X IRQ

SMI# E

NABLE

EGISTER

– I

NDEX

1A.................................................................................... - 21 -

-1-

July, 2007

V0.27P

F75111

7.21 GP1X O

UTPUT

RIVING

NABLE

– I

NDEX

1B............................................................................................... - 21 -

7.22 GP1X O

UTPUT

RIVING

NABLE

– I

NDEX

1C............................................................................................... - 22 -

7.23 GPIO2

UTPUT

ONTROL

EGISTER

– I

NDEX

........................................................................................ - 23 -

7.24 GPIO2

UTPUT

ATA

EGISTER

– I

NDEX

............................................................................................... - 23 -

7.25 GPIO2

NPUT

TATUS

EGISTER

– I

NDEX

............................................................................................... - 24 -

7.26 GPIO2

EVEL

ULSE

ONTROL

EGISTER

– I

NDEX

................................................................................ - 24 -

7.27 GPIO2

ULSE

IDTH

ONTROL

EGISTER

– I

NDEX

................................................................................ - 25 -

7.28 GPIO2

ULL

ESISTOR

ONTROL

EGISTER

– I

NDEX

........................................................................ - 25 -

7.29 GPIO2

NPUT

BOUNCE

EGISTER

– I

NDEX

........................................................................................ - 25 -

7.30 GPIO2

ULSE

NVERSE

EGISTER

– I

NDEX

............................................................................................ - 26 -

7.31 GP2

DGE

ETECTOR

NABLE

EGISTER

– I

NDEX

28 ............................................................................... - 27 -

7.32 GP2X E

DGE

ETECTOR

TATUS

EGISTER

– I

NDEX

29 ............................................................................... - 28 -

7.33 GP2X IRQ

SMI# E

NABLE

EGISTER

– I

NDEX

2A.................................................................................... - 28 -

7.34 GP2X O

UTPUT

RIVING

NABLE

– I

NDEX

2B............................................................................................... - 29 -

7.35 GP2X O

UTPUT

RIVING

NABLE

– I

NDEX

2C............................................................................................... - 29 -

7.36 WDTOUT C

ONTROL

EGISTER

– I

NDEX

................................................................................................... - 30 -

7.37 WDTOUT10 C

ONTROL

EGISTER

– I

NDEX

............................................................................................... - 30 -

7.38 W

ATCHDOG

IMER

ONTROL

EGISTER

– I

NDEX

....................................................................................... - 31 -

7.39 W

ATCHDOG

IMER

ANGE

EGISTER

– I

NDEX

........................................................................................... - 31 -

7.40 GPIO3

UTPUT

ONTROL

EGISTER

– I

NDEX

........................................................................................ - 32 -

7.41 GPIO3

UTPUT

ATA

EGISTER

– I

NDEX

............................................................................................... - 32 -

7.42 GPIO3

NPUT

TATUS

EGISTER

– I

NDEX

............................................................................................... - 32 -

7.43 GPIO3

EVEL

ULSE

ONTROL

EGISTER

– I

NDEX

................................................................................ - 33 -

7.44 GPIO3

ULSE

IDTH

ONTROL

EGISTER

– I

NDEX

................................................................................ - 33 -

7.45 GPIO3

NPUT

BOUNCE

EGISTER

– I

NDEX

........................................................................................ - 33 -

7.46 GPIO3

ULSE

NVERSE

EGISTER

– I

NDEX

............................................................................................ - 34 -

7.47 GP3

DGE

ETECTOR

NABLE

EGISTER

– I

NDEX

48 ............................................................................... - 34 -

7.48 GP3X E

DGE

ETECTOR

TATUS

EGISTER

– I

NDEX

49 ............................................................................... - 34 -

7.49 GP3X IRQ

SMI# E

NABLE

EGISTER

– I

NDEX

4A.................................................................................... - 35 -

7.50 GP3X O

UTPUT

RIVING

NABLE

– I

NDEX

4C............................................................................................... - 35 -

7.51 CHIPID(1) R

EGISTER

– I

NDEX

................................................................................................................. - 36 -

7.52 CHIPID(2) R

EGISTER

– I

NDEX

................................................................................................................. - 36 -

7.53 VENDOR ID(1) R

EGISTER

– I

NDEX

......................................................................................................... - 36 -

7.54 VENDOR ID(2) R

EGISTER

– I

NDEX

......................................................................................................... - 36 -

8. ELECTRON CHARACTERISTIC............................................................................................................................- 37 -

8.1 A

BSOLUTE

AXIMUM

ATINGS

........................................................................................................................... - 37 -

-2-

July, 2007

V0.27P

F75111

8.2 DC C

HARACTERISTICS

...................................................................................................................................... - 37 -

8.3 AC C

HARACTERISTICS

...................................................................................................................................... - 39 -

9. ORDERING INFORMATION ...................................................................................................................................- 40 -

10. PACKAGE DIMENSIONS ....................................................................................................................................- 40 -

F75111 D

EMO

IRCUIT

........................................................................................................................................... - 43 -

-3-

July, 2007

V0.27P

F75111R Related Products

	F75111R	F75111N	F75111	F75111RG
Description	Low Power GPIO Datasheet	Low Power GPIO Datasheet	Low Power GPIO Datasheet	Low Power GPIO Datasheet

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