HD74ACT280T datasheet, PDF - EEWORLD Datasheet

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HD74ACT280T: DescriptionPARITY GENERATOR/CHECKER, PDSO14, TTP-14D; Categorylogic logic; File Size50KB，9 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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HD74ACT280T Overview

PARITY GENERATOR/CHECKER, PDSO14, TTP-14D

HD74ACT280T Parametric

Parameter Name	Attribute value
Parts packaging code	SOIC
package instruction	TSSOP,
Contacts	14
Reach Compliance Code	compliant
series	ACT
JESD-30 code	R-PDSO-G14
length	5 mm
Logic integrated circuit type	PARITY GENERATOR/CHECKER
Number of digits	9
Number of functions	1
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	16.5 ns
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
width	4.4 mm
Base Number Matches	1

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HD74AC280/HD74ACT280

9-bit Parity Generator/Checker

Description

The HD74AC280/HD74ACT280 is a high-speed parity generator/checker that accepts nine bits of input

data and detects whether an even or an odd number of these inputs is High. If an even number of inputs is

High, the Sum Even output is High. If an odd number is High, the Sum Even output is Low. The Sum Odd

output is the complement of the Sum Even output.

Features

•

Outputs Source/Sink 24 mA

•

HD74ACT280 has TTL-Cmpatible Inputs

Pin Arrangement

NC 3

GND 7

(Top view)

14 V

13 I

12 I

11 I

10 I

9 I

8 I

HD74ACT280T Related Products

	HD74ACT280T	HD74AC280T
Description	PARITY GENERATOR/CHECKER, PDSO14, TTP-14D	PARITY GENERATOR/CHECKER, PDSO14, TTP-14D
Parts packaging code	SOIC	SOIC
package instruction	TSSOP,	TSSOP,
Contacts	14	14
Reach Compliance Code	compliant	unknow
series	ACT	AC
JESD-30 code	R-PDSO-G14	R-PDSO-G14
length	5 mm	5 mm
Logic integrated circuit type	PARITY GENERATOR/CHECKER	PARITY GENERATOR/CHECKER
Number of digits	9	9
Number of functions	1	1
Number of terminals	14	14
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Output polarity	COMPLEMENTARY	COMPLEMENTARY
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	16.5 ns	18.5 ns
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.1 mm	1.1 mm
Maximum supply voltage (Vsup)	5.5 V	3.6 V
Minimum supply voltage (Vsup)	4.5 V	3 V
Nominal supply voltage (Vsup)	5 V	3.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL
width	4.4 mm	4.4 mm

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