IN74HC192AD datasheet, PDF - EEWORLD Datasheet

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IN74HC192AD: DescriptionPresettable BCD/Decade UP/DOWN Counter High-Performance Silicon-Gate CMOS; File Size244KB，8 Pages; ManufacturerIK Semicon; Websitehttp://www.iksemi.com/en/index.html

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IN74HC192AD Overview

Presettable BCD/Decade UP/DOWN Counter High-Performance Silicon-Gate CMOS

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TECHNICAL DATA

IN74HC192A

Presettable BCD/Decade UP/DOWN Counter

High-Performance Silicon-Gate CMOS

The IN74HC192A is identical in pinout to the LS/ALS192. The device

inputs are compatible with standard CMOS outputs; with pullup resistors,

they are compatible with LS/ALSTTL outputs.

The counter has two separate clock inputs, a Count Up Clock and

Count Down Clock inputs. The direction of counting is determined by

which input is clocked. The outputs change state synchronous with the

LOW-to-HIGH transitions on the clock inputs. This counter may be preset

by entering the desired data on the P0, P1, P2, P3 input. When the Parallel

Load input is taken low the data is loaded independently of either clock

input. This feature allows the counters to be used as devide-by-n by

modifying the count lenght with the preset inputs. In addition the counter

can also be cleared. This is accomplished by inputting a high on the

Master Reset input. All 4 internal stages are set to low independently of

either clock input.Both a Terminal Count Down (TC

) and Terminal

Count Up (TC

) Outputs are provided to enable cascading of both up and

down counting functions. The TC

output produces a negative going pulse

when the counter underflows and TC

outputs a pulse when the counter

overflows. The counter can be cascaded by connecting the TC

and TC

outputs of one device to the Count Up Clock and Count Down Clock

inputs, respectively, of the next device.

•

Outputs Directly Interface to CMOS, NMOS, and TTL

•

Operating Voltage Range: 2.0 to 6.0 V

•

Low Input Current: 1.0

µA

•

High Noise Immunity Characteristic of CMOS Devices

ORDERING INFORMATION

IN74HC192AN Plastic

IN74HC192AD SOIC

= -55° to 125° C for all packages

PIN ASSIGNMENT

LOGIC DIAGRAM

PIN 16 =V

PIN 8 = GND

Rev. 00

IN74HC192AD Related Products

	IN74HC192AD	IN74HC192AN	IN74HC192A
Description	Presettable BCD/Decade UP/DOWN Counter High-Performance Silicon-Gate CMOS	Presettable BCD/Decade UP/DOWN Counter High-Performance Silicon-Gate CMOS	Presettable BCD/Decade UP/DOWN Counter High-Performance Silicon-Gate CMOS

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