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LTC1040CN

Description
Dual Micropower Comparator
CategoryAnalog mixed-signal IC    Amplifier circuit   
File Size213KB,12 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Download Datasheet Parametric Compare View All

LTC1040CN Overview

Dual Micropower Comparator

LTC1040CN Parametric

Parameter NameAttribute value
Brand NameLinear Technology
Is it Rohs certified?incompatible
MakerLinear ( ADI )
Parts packaging codeDIP
package instructionDIP, DIP18,.3
Contacts18
Manufacturer packaging codeN
Reach Compliance Code_compli
ECCN codeEAR99
Amplifier typeCOMPARATOR
Maximum input offset voltage750 µV
JESD-30 codeR-PDIP-T18
JESD-609 codee0
Humidity sensitivity level1
Negative supply voltage upper limit-9 V
Nominal Negative Supply Voltage (Vsup)-5 V
Number of functions2
Number of terminals18
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP18,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5/15/+-5 V
Certification statusNot Qualified
Nominal response time80000 ns
Maximum seat height3.937 mm
Maximum slew rate3 mA
Supply voltage upper limit9 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
Base Number Matches1
LTC1040
Dual Micropower
Comparator
FEATURES
s
s
DESCRIPTIO
s
s
s
s
s
Micropower
1.5µW (1 Sample/Second)
Power Supply Flexibility
Single Supply 2.8V to 16V
Split Supply
±2.8V
to
±8V
Guaranteed
Max Offset 0.75mV
Guaranteed
Max Tracking Error Between Input
Pairs
±
0.1%
Input Common Mode Range to Both Supply Rails
TTL/CMOS Compatible with
±5V
or Single 5V
Supply
Input Errors are Stable with Time and Temperature
The LTC
®
1040 is a monolithic CMOS dual comparator
manufactured using Linear Technology’s enhanced
LTCMOS
TM
silicon gate process. Extremely low operating
power levels are achieved by internally switching the
comparator ON for short periods of time. The CMOS
output logic holds the output information continuously
while not consuming any power.
In addition to switching power ON, a switched output is
provided to drive external loads during the comparator’s
active time. This allows not only low comparator power,
but low total system power.
Sampling is controlled by an external strobe input or an
internal oscillator. The oscillator frequency is set by an
external RC network.
Each comparator has a unique input structure, giving two
differential inputs. The output of the comparator will be
high if the algebraic sum of the inputs is positive and low
if the algebraic sum of the inputs is negative.
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTCMOS™ is a trademark of Linear Technology Corporation.
APPLICATIO S
s
s
s
s
Battery-Powered Systems
Remote Sensing
Window Comparator
BANG-BANG Controllers
TYPICAL APPLICATIO
Window Comparator with Symmetric Window Limits
1000
Typical LTC1040 Supply Current
vs Sampling Frequency
V
S
=
±5V
LTC1040
A
OUT
= “1” WHEN
V
IN
> V
C
+
COMP A
SUPPLY CURRENT, I
S
(µA)
V
IN
+
+
100
10
A + B = “1” WHEN
V
C
∆ ≤
V
IN
V
C
+
V
C
1
R
EXT
= 10M
+
+
COMP B
B
OUT
= “1” WHEN
V
IN
< V
C
0.10
0.01
0.1
1
100
1,000
10
SAMPLING FREQUENCY, f
S
(Hz)
LTC1040 • TA01
U
EXTERNALLY STROBED
10,000
LTC1040 • TA02
U
U
1040fa
1

LTC1040CN Related Products

LTC1040CN LTC1040CSW LTC1040MJ LTC1040_09
Description Dual Micropower Comparator Dual Micropower Comparator Dual Micropower Comparator Dual Micropower Comparator
Is it Rohs certified? incompatible incompatible incompatible -
Maker Linear ( ADI ) Linear ( ADI ) Linear ( ADI ) -
Parts packaging code DIP SOIC DIP -
package instruction DIP, DIP18,.3 SOP, SOP18,.4 0.300 INCH, HERMETIC SEALED, CERDIP-18 -
Contacts 18 18 18 -
Reach Compliance Code _compli _compli compli -
ECCN code EAR99 EAR99 EAR99 -
Amplifier type COMPARATOR COMPARATOR COMPARATOR -
Maximum input offset voltage 750 µV 750 µV 750 µV -
JESD-30 code R-PDIP-T18 R-PDSO-G18 R-GDIP-T18 -
JESD-609 code e0 e0 e0 -
Negative supply voltage upper limit -9 V -9 V -9 V -
Nominal Negative Supply Voltage (Vsup) -5 V -5 V -5 V -
Number of functions 2 2 2 -
Number of terminals 18 18 18 -
Maximum operating temperature 85 °C 85 °C 125 °C -
Minimum operating temperature -40 °C -40 °C -55 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY CERAMIC, GLASS-SEALED -
encapsulated code DIP SOP DIP -
Encapsulate equivalent code DIP18,.3 SOP18,.4 DIP18,.3 -
Package shape RECTANGULAR RECTANGULAR RECTANGULAR -
Package form IN-LINE SMALL OUTLINE IN-LINE -
power supply 5/15/+-5 V +-5 V 5/15/+-5 V -
Certification status Not Qualified Not Qualified Not Qualified -
Nominal response time 80000 ns 80000 ns 80000 ns -
Maximum seat height 3.937 mm 2.642 mm 5.08 mm -
Maximum slew rate 3 mA 3 mA 3 mA -
Supply voltage upper limit 9 V 9 V 9 V -
Nominal supply voltage (Vsup) 5 V 5 V 5 V -
surface mount NO YES NO -
technology CMOS CMOS CMOS -
Temperature level INDUSTRIAL INDUSTRIAL MILITARY -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal form THROUGH-HOLE GULL WING THROUGH-HOLE -
Terminal pitch 2.54 mm 1.27 mm 2.54 mm -
Terminal location DUAL DUAL DUAL -
width 7.62 mm 7.5 mm 7.62 mm -
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