TC74AC112F(EL) datasheet, PDF - EEWORLD Datasheet

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TC74AC112F(EL): DescriptionIC AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 0.300 INCH, PLASTIC, SOIC-16, FF/Latch; Categorylogic logic; File Size103KB，4 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/

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TC74AC112F(EL) Overview

IC AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 0.300 INCH, PLASTIC, SOIC-16, FF/Latch

TC74AC112F(EL) Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	SOIC
package instruction	SOP,
Contacts	16
Reach Compliance Code	unknown
series	AC
JESD-30 code	R-PDSO-G16
JESD-609 code	e0
length	10.3 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	J-K FLIP-FLOP
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	240
propagation delay (tpd)	10.8 ns
Certification status	Not Qualified
Maximum seat height	1.9 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	NEGATIVE EDGE
width	5.3 mm
minfmax	80 MHz
Base Number Matches	1

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TC74AC112F(EL) Related Products

	TC74AC112F(EL)	TC74AC112F(TP2)	TC74AC112F(TP1)
Description	IC AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 0.300 INCH, PLASTIC, SOIC-16, FF/Latch	IC AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 0.300 INCH, PLASTIC, SOIC-16, FF/Latch	IC AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 0.300 INCH, PLASTIC, SOIC-16, FF/Latch
Is it Rohs certified?	incompatible	incompatible	incompatible
Parts packaging code	SOIC	SOIC	SOIC
package instruction	SOP,	SOP,	SOP,
Contacts	16	16	16
Reach Compliance Code	unknown	unknown	unknown
series	AC	AC	AC
JESD-30 code	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16
JESD-609 code	e0	e0	e0
length	10.3 mm	10.3 mm	10.3 mm
Load capacitance (CL)	50 pF	50 pF	50 pF
Logic integrated circuit type	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP
Number of digits	2	2	2
Number of functions	2	2	2
Number of terminals	16	16	16
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Output polarity	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	240	240	240
propagation delay (tpd)	10.8 ns	10.8 ns	10.8 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.9 mm	1.9 mm	1.9 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	2 V	2 V	2 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Trigger type	NEGATIVE EDGE	NEGATIVE EDGE	NEGATIVE EDGE
width	5.3 mm	5.3 mm	5.3 mm
minfmax	80 MHz	80 MHz	80 MHz
Base Number Matches	1	1	1
Is it lead-free?	-	Contains lead	Contains lead

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