LTC1749IFW datasheet, PDF - EEWORLD Datasheet

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LTC1749IFW: Description12-Bit, 80Msps Wide Bandwidth ADC; CategoryAnalog mixed-signal IC converter; File Size275KB，20 Pages; ManufacturerLinear ( ADI ); Websitehttp://www.analog.com/cn/index.html

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LTC1749IFW Overview

12-Bit, 80Msps Wide Bandwidth ADC

LTC1749IFW Parametric

Parameter Name	Attribute value
Brand Name	Linear Technology
Is it Rohs certified?	incompatible
Maker	Linear ( ADI )
Parts packaging code	TSSOP
package instruction	6.1 MM, PLASTIC, TSSOP-48
Contacts	48
Manufacturer packaging code	FW
Reach Compliance Code	_compli
ECCN code	3A991.C.2
Is Samacsys	N
Maximum analog input voltage	1.125 V
Converter type	ADC, PROPRIETARY METHOD
JESD-30 code	R-PDSO-G48
JESD-609 code	e0
length	12.5 mm
Maximum linear error (EL)	0.0244%
Humidity sensitivity level	1
Number of analog input channels	1
Number of digits	12
Number of functions	1
Number of terminals	48
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output bit code	OFFSET BINARY, 2'S COMPLEMENT BINARY
Output format	PARALLEL, WORD
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP48,.3,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Sampling rate	80 MHz
Sample and hold/Track and hold	SAMPLE
Maximum seat height	1.2 mm
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6.1 mm
Base Number Matches	1

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LTC1749

12-Bit, 80Msps

Wide Bandwidth ADC

DESCRIPTIO

The LTC

1749 is an 80Msps, 12-bit A/D converter de-

signed for digitizing wide dynamic range signals up to

frequencies of 500MHz. The input range of the ADC can be

optimized with the on-chip PGA sample-and-hold circuit

and flexible reference circuitry.

The LTC1749 has a highly linear sample-and-hold circuit

with a bandwidth of 500MHz. The SFDR is 80dB with an

input frequency of 250MHz. Ultralow jitter of 0.15ps

RMS

allows undersampling of IF frequencies with minimal

degradation in SNR. DC specs include

±1LSB

INL and no

missing codes.

The digital interface is compatible with 5V, 3V, 2V and

LVDS logic systems. The ENC and ENC inputs may be

driven differentially from PECL, GTL and other low swing

logic families or from single-ended TTL or CMOS. The low

noise, high gain ENC and ENC inputs may also be driven

by a sinusoidal signal without degrading performance. A

separate output power supply can be operated from 0.5V

to 5V, making it easy to connect directly to low voltage

DSPs or FIFOs.

The 48-pin TSSOP package with a flow-through pinout

simplifies the board layout.

, LTC and LT are registered trademarks of Linear Technology Corporation.

FEATURES

Sample Rate: 80Msps

PGA Front End (2.25V

P-P

or 1.35V

P-P

Input Range)

71.8dB SNR and 87dB SFDR (PGA = 0)

70.2dB SNR and 87dB SFDR (PGA = 1)

500MHz Full Power Bandwidth S/H

No Missing Codes

Single 5V Supply

Power Dissipation: 1.45W

Two Pin Selectable Reference Values

Data Ready Output Clock

Pin Compatible 14-Bit 80Msps Device (LTC1750)

48-Pin TSSOP Package

APPLICATIO S

Direct IF Sampling

Telecommunications

Receivers

Cellular Base Stations

Spectrum Analysis

Communications Test Equipment

Undersampling

BLOCK DIAGRA

PGA

IN+

±1.125V

DIFFERENTIAL

–

ANALOG INPUT A

SENSE

80Msps, 12-Bit ADC with a 2.25V Differential Input Range

0.1µF

S/H

CIRCUIT

12-BIT

PIPELINED ADC

CORRECTION

LOGIC AND

SHIFT

OUTPUT

LATCHES

•

D11

CLKOUT

0.5V TO 5V

0.1µF

BUFFER

RANGE

SELECT

1µF

DIFF AMP

GND

CONTROL LOGIC

1749 BD

4.7µF

REF

REFLB

0.1µF

1µF

REFHA

4.7µF

REFLA

REFHB

0.1µF

ENC

1µF

DIFFERENTIAL

ENCODE INPUT

OGND

1µF

MSBINV

1749f

LTC1749IFW Related Products

	LTC1749IFW	LTC1749	LTC1749CFW
Description	12-Bit, 80Msps Wide Bandwidth ADC	12-Bit, 80Msps Wide Bandwidth ADC	12-Bit, 80Msps Wide Bandwidth ADC
Brand Name	Linear Technology	-	Linear Technology
Is it Rohs certified?	incompatible	-	incompatible
Maker	Linear ( ADI )	-	Linear ( ADI )
Parts packaging code	TSSOP	-	TSSOP
package instruction	6.1 MM, PLASTIC, TSSOP-48	-	6.1 MM, PLASTIC, TSSOP-48
Contacts	48	-	48
Manufacturer packaging code	FW	-	FW
Reach Compliance Code	_compli	-	_compli
ECCN code	3A991.C.2	-	3A991.C.2
Is Samacsys	N	-	N
Maximum analog input voltage	1.125 V	-	1.125 V
Converter type	ADC, PROPRIETARY METHOD	-	ADC, PROPRIETARY METHOD
JESD-30 code	R-PDSO-G48	-	R-PDSO-G48
JESD-609 code	e0	-	e0
length	12.5 mm	-	12.5 mm
Maximum linear error (EL)	0.0244%	-	0.0244%
Humidity sensitivity level	1	-	1
Number of analog input channels	1	-	1
Number of digits	12	-	12
Number of functions	1	-	1
Number of terminals	48	-	48
Maximum operating temperature	85 °C	-	70 °C
Output bit code	OFFSET BINARY, 2'S COMPLEMENT BINARY	-	OFFSET BINARY, 2'S COMPLEMENT BINARY
Output format	PARALLEL, WORD	-	PARALLEL, WORD
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY
encapsulated code	TSSOP	-	TSSOP
Encapsulate equivalent code	TSSOP48,.3,20	-	TSSOP48,.3,20
Package shape	RECTANGULAR	-	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	-	NOT SPECIFIED
power supply	5 V	-	5 V
Certification status	Not Qualified	-	Not Qualified
Sampling rate	80 MHz	-	80 MHz
Sample and hold/Track and hold	SAMPLE	-	SAMPLE
Maximum seat height	1.2 mm	-	1.2 mm
Nominal supply voltage	5 V	-	5 V
surface mount	YES	-	YES
technology	CMOS	-	CMOS
Temperature level	INDUSTRIAL	-	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	-	GULL WING
Terminal pitch	0.5 mm	-	0.5 mm
Terminal location	DUAL	-	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	-	NOT SPECIFIED
width	6.1 mm	-	6.1 mm
Base Number Matches	1	-	1

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