EEWORLDEEWORLDEEWORLD

Part Number

Search

A2F500M3C-1CS288Y

Description
Field Programmable Gate Array, 11520 CLBs, 500000 Gates, CMOS, PBGA288, 0.50 MM PITCH, CSP-288
CategoryProgrammable logic devices    Programmable logic   
File Size9MB,182 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

A2F500M3C-1CS288Y Overview

Field Programmable Gate Array, 11520 CLBs, 500000 Gates, CMOS, PBGA288, 0.50 MM PITCH, CSP-288

A2F500M3C-1CS288Y Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionTFBGA,
Reach Compliance Codecompliant
JESD-30 codeS-PBGA-B288
JESD-609 codee0
length11 mm
Configurable number of logic blocks11520
Equivalent number of gates500000
Number of terminals288
Maximum operating temperature85 °C
Minimum operating temperature
organize11520 CLBS, 500000 GATES
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Package shapeSQUARE
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Certification statusNot Qualified
Maximum seat height1.05 mm
Maximum supply voltage1.575 V
Minimum supply voltage1.425 V
Nominal supply voltage1.5 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTIN LEAD SILVER
Terminal formBALL
Terminal pitch0.5 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width11 mm
Base Number Matches1
Revision 7
SmartFusion Customizable System-on-Chip (cSoC)
Microcontroller Subsystem (MSS)
Hard 100 MHz 32-Bit ARM
®
Cortex™-M3
– 1.25 DMIPS/MHz Throughput from Zero Wait State
Memory
– Memory Protection Unit (MPU)
– Single Cycle Multiplication, Hardware Divide
– JTAG Debug (4 wires), Serial Wire Debug (SWD, 2
wires), and Single Wire Viewer (SWV) Interfaces
Internal Memory
– Embedded Nonvolatile Flash Memory (eNVM), 128
Kbytes to 512 Kbytes
– Embedded High-Speed SRAM (eSRAM), 16 Kbytes
to 64 Kbytes, Implemented in 2 Physical Blocks to
Enable Simultaneous Access from 2 Different
Masters
Multi-Layer AHB Communications Matrix
– Provides up to 16 Gbps of On-Chip Memory
Bandwidth,
1
Allowing Multi-Master Schemes
10/100 Ethernet MAC with RMII Interface
2
Programmable External Memory Controller, Which
Supports:
– Asynchronous Memories
– NOR Flash, SRAM, PSRAM
– Synchronous SRAMs
Two I
2
C Peripherals
Two 16550 Compatible UARTs
Two SPI Peripherals
Two 32-Bit Timers
32-Bit Watchdog Timer
8-Channel DMA Controller to Offload the Cortex-M3
from Data Transactions
Clock Sources
– 32 KHz to 20 MHz Main Oscillator
– Battery-Backed 32 KHz Low Power Oscillator with
Real-Time Counter (RTC)
– 100 MHz Embedded RC Oscillator; 1% Accurate
– Embedded Analog PLL with 4 Output Phases (0, 90,
180, 270)
Based on proven ProASIC
®
3 FPGA Fabric
Low Power, Firm-Error Immune 130-nm, 7-Layer Metal,
Flash-Based CMOS Process
Nonvolatile, Live at Power-Up, Retains Program When
Powered Off
350 MHz System Performance
Embedded SRAMs and FIFOs
– Variable Aspect Ratio 4,608-Bit SRAM Blocks
– x1, x2, x4, x9, and x18 Organizations
– True Dual-Port SRAM (excluding x18)
– Programmable Embedded FIFO Control Logic
Secure ISP with 128-Bit AES via JTAG
FlashLock
®
to Secure FPGA Contents
Five Clock Conditioning Circuits (CCCs) with up to 2
Integrated Analog PLLs
– Phase Shift, Multiply/Divide, and Delay Capabilities
– Frequency: Input 1.5–350 MHz, Output 0.75 to
350 MHz
Programmable Analog
Analog Front-End (AFE)
Up to Three 12-Bit SAR ADCs
– 500 Ksps in 12-Bit Mode
– 550 Ksps in 10-Bit Mode
– 600 Ksps in 8-Bit Mode
Internal 2.56 V Reference or Optional External
Reference
One First-Order
ΣΔ
DAC (sigma-delta) per ADC
– 12-Bit 500 Ksps Update Rate
Up to 5 High-Performance Analog Signal Conditioning
Blocks (SCB) per Device, Each Including:
– Two High-Voltage Bipolar Voltage Monitors (with 4
input ranges from ±2.5 V to –11.5/+14 V) with 1%
Accuracy
– High Gain Current Monitor, Differential Gain = 50, up
to 14 V Common Mode
– Temperature Monitor (Resolution = ¼°C in 12-Bit
Mode; Accurate from –55°C to 150°C)
Up to Ten High-Speed Voltage Comparators
(t
pd
= 15 ns)
Offloads Cortex-M3–Based MSS from Analog
Initialization and Processing of ADC, DAC, and SCBs
Sample Sequence Engine for ADC and DAC Parameter
Set-Up
Post-Processing Engine for Functions such as Low-
Pass Filtering and Linear Transformation
Easily Configured via GUI in Libero
®
Integrated Design
(IDE) Software
FPGA I/Os
– LVDS, PCI, PCI-X, up to 24 mA IOH/IOL
– Up to 350 MHz
MSS I/Os
– Schmitt Trigger, up to 6 mA IOH, 8 mA IOL
– Up to 180 MHz
Single 3.3 V Power Supply with On-Chip 1.5 V Regulator
External 1.5 V Is Allowed by Bypassing Regulator
(digital VCC = 1.5 V for FPGA and MSS, analog VCC =
3.3 V and 1.5 V)
Analog Compute Engine (ACE)
High-Performance FPGA
I/Os and Operating Voltage
1 Theoretical maximum
2 A2F200 and larger devices
August 2011
© 2011 Microsemi Corporation
I
Develop an intelligent remote fish pond control system using Gizwits DTU
In industrial products, many sensors and devices are based on the standard modbus RTU protocol. To solve the product development cycle of developers, Gizwits launched the GC511 CAT.1 DTU wireless data...
毛球大大 RF/Wirelessly
【Cadence Tips Learning】 4th post TXT
[align=center][font=宋体]【[/font]Cadence[font=宋体] Tips Learning】[/font][font=宋体] No. 4[font=宋体] TXT[/align][align=left][size=4][u][color=red][font=宋体]First of all, I would like to explain that our compa...
常见泽1 PCB Design
[Linux Learning Session 1] Installing Ubuntu on a Virtual Machine
To learn Calibri Linux, you must first build a Calibri Linux environment. I am also a novice, so I would like to share my experience in building a Calibri Linux environment. 1. Install VMware Workstat...
ou513 Linux and Android
[Easy Power Supply Trial] --- There is a problem with the judgment of unknown models, come and help
Two unknown models are afraid of Yi Power Supply, but we have to try it out. 1. Try possible packages. Check the seven-pin packages of various Yi Power Supply, and the 1 series are basically like this...
dontium Analogue and Mixed Signal
Get a bottle of Gumianchun.
Get a bottle of Gumianchun....
zpfst Embedded System
[Xianji HPM6750EVKMINI Review] 2#OLED module and LVGL routine test
1. Display hardware I looked through the display modules I bought before. Since the systems I developed before did not have screens, I rarely bought display screens. I only found a 0.9-inch OLED scree...
太阳上的骑士 Domestic Chip Exchange

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1860  1749  2446  269  2220  38  36  50  6  45 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号