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LTC2289UP

Description
Dual 10-Bit, 80Msps Low Noise 3V ADC
File Size653KB,24 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Download Datasheet View All

LTC2289UP Overview

Dual 10-Bit, 80Msps Low Noise 3V ADC

LTC2289
Dual 10-Bit, 80Msps
Low Noise 3V ADC
FEATURES
DESCRIPTIO
Integrated Dual 10-Bit ADCs
Sample Rate: 80Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 422mW
61.6dB SNR at 70MHz Input
85dB SFDR at 70MHz Input
110dB Channel Isolation at 100MHz
Multiplexed or Separate Data Bus
Flexible Input: 1V
P-P
to 2V
P-P
Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2280 (10-Bit)
80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit)
65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit)
40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit)
25Msps: LTC2291 (12-Bit), LTC2286 (10-Bit)
64-Pin (9mm
×
9mm) QFN Package
The LTC
®
2289 is a 10-bit 80Msps, low noise 3V dual A/D
converter designed for digitizing high frequency, wide
dynamic range signals. The LTC2289 is perfect for
demanding imaging and communications applications
with AC performance that includes 61.6dB SNR and 85dB
SFDR for signals well beyond the Nyquist frequency.
DC specs include
±0.1LSB
INL (typ),
±0.1LSB
DNL (typ)
and
±0.6LSB
INL,
±0.5LSB
DNL over temperature. The
transition noise is a low 0.08LSB
RMS
.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share a digital output bus.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
TYPICAL APPLICATIO
+
ANALOG
INPUT A
INPUT
S/H
10-BIT
PIPELINED
ADC CORE
OV
DD
OUTPUT
DRIVERS
D9A
D0A
OGND
SNR (dBFS)
CLK A
CLOCK/DUTY CYCLE
CONTROL
MUX
CLOCK/DUTY CYCLE
CONTROL
OV
DD
CLK B
+
ANALOG
INPUT B
INPUT
S/H
10-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D9B
D0B
OGND
2289 TA01
U
SNR vs Input Frequency,
–1dB, 2V Range, 80Msps
65
64
63
62
61
60
59
58
57
56
55
0
100
50
150
INPUT FREQUENCY (MHz)
200
2289 TA02
U
U
2289fa
1
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