HCPL-M452/HCPL-M453
Small Outline, 5 Lead, High Speed Optocouplers
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
These small outline high CMR, high speed, diode-transis-
tor optocouplers are single channel devices in a five lead
miniature footprint. They are electrically equivalent to the
following Avago optocouplers:
The SO-5 JEDEC registered (MO-155) package outline
does not require “through holes” in a PCB. This package
occupies approximately one-fourth the footprint area of
the standard dual-in-line package. The lead profile is de-
signed to be com-patible with standard surface mount
processes.
These diode-transistor optocouplers use an insulating lay-
er between the light emitting diode and an integrated
photon detector to provide electrical insulation between
input and output. Separate connections for the photo-
diode bias and output transistor collector increase the
speed up to a hundred times over that of a conventional
photo-transistor coupler by reducing the base-collector
capacitance.
The HCPL-M452 is designed for high speed TTL/TTL
applications. A standard 16 mA TTL sink current through
the input LED will provide enough output current for 1
TTL load and a 5.6 k½ pull-up resistor. CTR of the HCPL-
M452 is 19% minimum at I
F
= 16 mA.
The HCPL-M453 is an HCPL-M452 with increased common
mode transient immunity of 15,000 V/µs minimum at
V
CM
= 1500 V guaranteed.
Features
•
Surface mountable
•
Very small, low profile JEDEC registered package outline
•
Compatible with infrared vapor phase reflow and wave
soldering processes
•
Very high common mode transient immunity:
15000 V/µs at V
CM
= 1500 V guaranteed (HCPL-M453)
•
High speed: 1 Mb/s
•
TTL compatible
•
Open collector output
•
Worldwide Safety Approval:
– UL1577 recognized, 3750Vrms/1min
– CSA Approved
•
Lead free option
Applications
•
Line receivers: High common mode transient immunity
(>1000 V/µs) and low input-output capacitance (0.6 pF).
•
High speed logic ground isolation: TTL/TTL, TTL/LTTL,
TTL/CMOS, TTL/LSTTL
•
Replace slow phototransistor optocouplers
•
Replace pulse transformers: save board space and
weight
•
Analog signal ground isolation: Integrated photon
detector provides improved linearity over photo-
transistor type
Ordering Options
SO-5 Package
HCPL-M452
HCPL-M453
Standard DIP
HCPL-4502
HCPL-4503
SO-8 Package
HCPL-0452
HCPL-0453
Note: These devices equivalent to 6N135/6N136 devices but without
the base lead.
CAUTION:
The small device geometries inherent to the design of this bipolar component increase the component's
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in
handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Ordering Information
HCPL-M452 and HCPL-M453 are UL Recognized with 3750 Vrms for 1 minute per UL1577.
Option
Part
Number
HCPL-M452
HCPL-M453
RoHS
Compliant
-000E
-500E
non RoHS
Compliant
no option
#500
Package
SO-5
Surface Mount
X
X
Tape & Reel
X
Quantity
100 per tube
1500 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
HCPL-M452-500E to order product of SO-5 Surface Mount package in Tape and Reel packaging and RoHS compliant.
Example 2:
HCPL-M452 to order product of SO-5 Surface Mount package in Tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since July 15, 2001 and RoHS
compliant will use ‘–XXXE.’
Outline Drawing (JEDEC MO-155)
LAND PATTERN RECOMMENDATION
DEVICE PART
NUMBER
0.33
(0.013)
TEST RATING
CODE
7.0 ± 0.2
(0.276 ± 0.008)
DATE CODE
LOT ID
0.4 ± 0.05
(0.016 ± 0.002)
3.6 ± 0.1*
(0.142 ± 0.004)
2.54
(0.10)
0.102 ± 0.102
(0.004 ± 0.004)
1.80
(0.071)
4.39
(0.17)
8.26
(0.325)
1.27
(0.05)
0.64
(0.025)
4.4 ± 0.1
(0.173 ± 0.004)
LEAD FREE
NNNN Z
•
YYWW
EEE
PIN 1 DOT
2.5 ± 0.1
(0.098 ± 0.004)
0.15 ± 0.025
(0.006 ± 0.001)
1.27 BSC
(0.050)
Dimensions in millimeters (inches).
Note: Foating Lead Protrusion is 0.15 mm (6 mils) max.
* Maximum Mold ash on each side is 0.15 mm (0.006).
0.71 MIN
(0.028)
MAX. LEAD COPLANARITY
= 0.102 (0.004)
7° MAX.
2
Schematic
I
CC
6
V
CC
Land Pattern Recommendation
4.4
(0.17)
ANODE
+
1
V
F
–
3
I
F
2.5
(0.10)
1.3
(0.05)
I
O
5
CATHODE
V
O
SHIELD
4
GND
2.0
(0.080)
8.27
(0.325)
Dimensions in millimeters and (inches)
0.64
(0.025)
Solder Reflow Thermal Profile
300
PREHEATING RATE 3°C + 1°C/–0.5°C/SEC.
REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.
PEAK
TEMP.
245°C
PEAK
TEMP.
240°C
TEMPERATURE (°C)
200
160°C
150°C
140°C
2.5°C ± 0.5°C/SEC.
30
SEC.
3°C + 1°C/–0.5°C
30
SEC.
PEAK
TEMP.
230°C
SOLDERING
TIME
200°C
100
PREHEATING TIME
150°C, 90 + 30 SEC.
ROOM
TEMPERATURE
50 SEC.
TIGHT
TYPICAL
LOOSE
0
0
50
100
TIME (SECONDS)
150
200
250
Note: Non-halide flux should be used.
Recommended Pb-Free IR Profile
Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision).
Non-Halide Flux should be used.
3
Regulatory Information
The HCPL-M452/M453 are approved by the following organizations:
UL
Approved under UL 1577, component recognition
program up to V
ISO
= 3750 V
RMS
expected prior to product
release.
CSA
Approved under CSA Component Acceptance Notice #5.
Insulation Related Specifications
Parameter
Min External Air Gap (Clearance)
Min. External Tracking Path (Creepage)
Min. Internal Plastic Gap (Clearance)
Tracking Resistance
Isolation Group (per DIN VDE 0109)
CTI
Symbol
L(IO1)
L(IO2)
Value
≥5
≥5
0.08
175
IIIa
Units
mm
mm
mm
V
Conditions
Measured from input terminals to output
terminals
Measured from input terminals to output
terminals
Through insulation distance conductor to
conductor
DIN IEC 112/VDE 0303 Part 1
Material Group DIN VDE 0109
Absolute Maximum Ratings
(No Derating Required up to 85°C)
Storage Temperature .............................................................................-55°C to +125°C
Operating Temperature ........................................................................-55°C to +100°C
Average Input Current - I
F
................................................................................ 25 mA
[1]
Peak Input Current - I
F
........................................................................................ 50 mA
[2]
(50% duty cycle, 1 ms pulse width)
Peak Transient Input Current - I
F
............................................................................ 1.0 A
(1 µs pulse width, 300 pps)
Reverse Input Voltage - V
R
(Pin3-1) ............................................................................ 5 V
Input Power Dissipation.....................................................................................45 mW
[3]
Average Output Current - I
O
(Pin 5) .......................................................................8 mA
Peak Output Current ................................................................................................ 16 mA
Output Voltage - V
O
(Pin 5-4) ................................................................... -0.5 V to 20 V
Supply Voltage - V
CC
(Pin 6-4) .................................................................. -0.5 V to 30 V
Output Power Dissipation .............................................................................. 100 mW
[4]
Infrared and Vapor Phase Reflow Temperature .......................................see below
4
Electrical Specifications
Over recommended temperature (T
A
= 0°C to 70°C) unless otherwise specified. (See note 11.)
Parameter
Current Transfer
Ratio
Logic Low Output
Voltage
Logic High Output
Current
Symbol
CTR
V
OL
I
OH
Min.
20
15
Typ.*
24
25
0.1
0.003
0.01
Max.
50
0.4
0.5
0.5
1
50
Units
%
V
µA
Test Conditions
T
A
= 25°C
T
A
= 25°C
T
A
= 25°C
T
A
= 25°C
V
O
= 0.4 V
V
O
= 0.5 V
I
O
= 3.0 mA
I
O
= 2.4 mA
V
O
= V
CC
=
5.5 V
V
O
= V
CC
=
15.0 V
I
F
= 0 mA
V
CC
= 4.5 V
I
F
= 16 mA
Fig.
1, 2, 4
Note
5
7
Logic Low Supply
Current
Logic High Supply
Current
Input Forward
Voltage
Input Reverse
Breakdown Voltage
Temperature
Coefficient of
Forward Voltage
Input Capacitance
Input-Output
Insulation
Resistance
(Input-Output)
Capacitance
(Input-Output)
* All typicals at T
A
= 25°C.
I
CCL
I
CCH
V
F
BV
R
ΔV
F
/
ΔT
A
C
IN
V
ISO
R
I-O
C
I-O
3750
5
50
0.02
1.5
200
1
2
1.7
1.8
V
I
F
= 16 mA, V
O
= Open, V
CC
= 15 V
T
A
= 25°C
T
A
= 25°C
I
R
= 10
µA
I
F
= 0 mA, V
O
= Open,
V
CC
= 15.0 V
I
F
= 16 mA
3
11
11
-1.6
mV/°C
I
F
= 16 mA
60
pF
V
RMS
f = 1 MHz, V
F
= 0
RH ≤ 50%, t = 1 min., T
A
= 25°C
V
I-O
= 500 V
DC
f = 1 MHz
6, 7
6
6
10
12
0.6
Ω
pF
5
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