Z8F6402VS020SG datasheet, PDF - EEWORLD Datasheet

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Z8F6402VS020SG: DescriptionMicrocontroller, 8-Bit, FLASH, 20MHz, CMOS, PQCC68, PLASTIC, LCC-68; CategoryThe embedded processor and controller Microcontrollers and processors; File Size4MB，246 Pages; ManufacturerZilog, Inc.; Websitehttps://www.zilog.com/; Environmental Compliance

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Z8F6402VS020SG Overview

Microcontroller, 8-Bit, FLASH, 20MHz, CMOS, PQCC68, PLASTIC, LCC-68

Z8F6402VS020SG Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Parts packaging code	LCC
package instruction	QCCJ,
Contacts	68
Reach Compliance Code	compliant
Has ADC	YES
Address bus width
bit size	8
maximum clock frequency	20 MHz
DAC channel	NO
DMA channel	YES
External data bus width
JESD-30 code	S-PQCC-J68
JESD-609 code	e3
length	24.23 mm
Humidity sensitivity level	3
Number of I/O lines	46
Number of terminals	68
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
ROM programmability	FLASH
Maximum seat height	4.57 mm
speed	20 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	24.23 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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Z8 Encore! Microcontrollers with Flash Memory and 10-Bit A/D Converter Product Specification

Z8F640x, Z8F480x, Z8F320x,

Z8F240x, and Z8F160x

Z8 Encore!

™

Microcontrollers

with Flash Memory and 10-Bit

A/D Converter

Product Specification

PS017611-0406

ZiLOG Worldwide Headquarters • 532 Race Street • San Jose, CA 95126-3432

Telephone: 408.558.8500 • Fax: 408.558.8300 •

www.ZiLOG.com

Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x

Z8 Encore!

iii

Table of Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Part Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

CPU and Peripheral Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

eZ8 CPU Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

General Purpose I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Flash Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

10-Bit Analog-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . 4

UARTs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Serial Peripheral Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Reset Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

On-Chip Debugger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Signal and Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Available Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Pin Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Address Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Reset and Stop Mode Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Reset Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

System and Short Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Reset Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Voltage Brown-Out Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Watch-Dog Timer Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

PS017611-0406

Table of Contents

Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x

Z8 Encore!

External Pin Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Stop Mode Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Stop Mode Recovery Using Watch-Dog Timer Time-Out . . . . . . .

Stop Mode Recovery Using a GPIO Port Pin Transition . . . . . . . .

Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Halt Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

General-Purpose I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

GPIO Port Availability By Device . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

GPIO Alternate Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

GPIO Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

GPIO Control Register Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Port A-H Address Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Port A-H Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Port A-H Input Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Port A-H Output Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Vector Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Master Interrupt Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Vectors and Priority . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Assertion Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Control Register Definitions . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Request 0 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Request 1 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Request 2 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IRQ0 Enable High and Low Bit Registers . . . . . . . . . . . . . . . . . . .

IRQ1 Enable High and Low Bit Registers . . . . . . . . . . . . . . . . . . .

IRQ2 Enable High and Low Bit Registers . . . . . . . . . . . . . . . . . . .

Interrupt Edge Select Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Port Select Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupt Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PS017611-0406

Table of Contents

Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x

Z8 Encore!

Timer Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Reading the Timer Count Values . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Output Signal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Control Register Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer 0-3 High and Low Byte Registers . . . . . . . . . . . . . . . . . . . .

Timer Reload High and Low Byte Registers . . . . . . . . . . . . . . . . .

Timer 0-3 PWM High and Low Byte Registers . . . . . . . . . . . . . . .

Timer 0-3 Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Watch-Dog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Watch-Dog Timer Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Watch-Dog Timer Time-Out Response . . . . . . . . . . . . . . . . . . . . .

Watch-Dog Timer Reload Unlock Sequence . . . . . . . . . . . . . . . . .

Watch-Dog Timer Control Register Definitions . . . . . . . . . . . . . . . . . .

Watch-Dog Timer Control Register . . . . . . . . . . . . . . . . . . . . . . . .

Watch-Dog Timer Reload Upper, High and Low Byte Registers .

UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Transmitting Data using the Polled Method . . . . . . . . . . . . . . . . . .

Transmitting Data using the Interrupt-Driven Method . . . . . . . . . .

Receiving Data using the Polled Method . . . . . . . . . . . . . . . . . . . .

Receiving Data using the Interrupt-Driven Method . . . . . . . . . . . .

Receiving Data using the Direct Memory Access

Controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Multiprocessor (9-bit) Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

UART Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

UART Baud Rate Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

UART Control Register Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .

UARTx Transmit Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . .

UARTx Receive Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .

UARTx Status 0 and Status 1 Registers . . . . . . . . . . . . . . . . . . . . .

UARTx Control 0 and Control 1 Registers . . . . . . . . . . . . . . . . . . .

UARTx Baud Rate High and Low Byte Registers . . . . . . . . . . . . .

Infrared Encoder/Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PS017611-0406

Table of Contents

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