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IXFR4N100Q

Description
Power Field-Effect Transistor, 3.5A I(D), 1000V, 3ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ISOPLUS247, 3 PIN
CategoryDiscrete semiconductor    The transistor   
File Size64KB,2 Pages
ManufacturerIXYS
Environmental Compliance  
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IXFR4N100Q Overview

Power Field-Effect Transistor, 3.5A I(D), 1000V, 3ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ISOPLUS247, 3 PIN

IXFR4N100Q Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instructionIN-LINE, R-PSIP-T3
Contacts3
Reach Compliance Codecompliant
Other featuresAVALANCHE RATED
Avalanche Energy Efficiency Rating (Eas)700 mJ
Shell connectionISOLATED
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage1000 V
Maximum drain current (ID)3.5 A
Maximum drain-source on-resistance3 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PSIP-T3
JESD-609 codee1
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum pulsed drain current (IDM)16 A
Certification statusNot Qualified
surface mountNO
Terminal surfaceTin/Silver/Copper (Sn/Ag/Cu)
Terminal formTHROUGH-HOLE
Terminal locationSINGLE
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
Advance Technical Information
HiPerFET
TM
Power MOSFETs
ISOPLUS247
TM
(Electrically Isolated Backside)
N-Channel Enhancement Mode
Avalanche Rated, Low Q
g
, High dv/dt
IXFR 4N100Q
V
DSS
= 1000 V
I
D25
= 3.5 A
R
DS(on)
= 3.0
t
rr
200ns
Symbol
V
DSS
V
DGR
V
GS
V
GSM
I
D25
I
DM
I
AR
E
AR
E
AS
dv/dt
P
D
T
J
T
JM
T
stg
T
L
V
ISOL
Weight
Test Conditions
T
J
= 25°C to 150°C
T
J
= 25°C to 150°C; R
GS
= 1 MΩ
Continuous
Transient
T
C
= 25°C
T
C
= 25°C, Note 1
T
C
= 25°C
T
C
= 25°C
T
C
= 25°C
I
S
I
DM
, di/dt
100 A/µs, V
DD
V
DSS
T
J
150°C, R
G
= 2
T
C
= 25°C
Maximum Ratings
1000
1000
±20
±30
3.5
16
4
20
700
5
80
-55 ... +150
150
-55 ... +150
V
V
V
V
A
A
A
mJ
mJ
V/ns
W
°C
°C
°C
°C
V~
g
ISOPLUS 247
TM
E153432
Isolated backside*
G = Gate
S = Source
D = Drain
* Patent pending
1.6 mm (0.063 in.) from case for 10 s
50/60 Hz, RMS
t = 1 min
300
2500
5
Features
l
Silicon chip on Direct-Copper-Bond
substrate
- High power dissipation
- Isolated mounting surface
- 2500V electrical isolation
l
Low drain to tab capacitance(<30pF)
l
l
l
Low R
DS (on)
HDMOS
TM
process
Rugged polysilicon gate cell structure
Rated for Unclamped Inductive Load
Switching (UIS)
l
Fast intrinsic Rectifier
Symbol
Test Conditions
Characteristic Values
(T
J
= 25°C, unless otherwise specified)
min. typ. max.
1000
3.0
V
5.0 V
±100
nA
T
J
= 25°C
T
J
= 125°C
50
µA
1 mA
3.0
Applications
l
DC-DC converters
l
l
l
l
Battery chargers
Switched-mode and resonant-mode
power supplies
DC choppers
AC motor control
V
DSS
V
GS(th)
I
GSS
I
DSS
R
DS(on)
V
GS
= 0 V, I
D
= 1mA
V
DS
= V
GS
, I
D
= 1.5 mA
V
GS
=
±20
V
DC
, V
DS
= 0
V
DS
= V
DSS
V
GS
= 0 V
V
GS
= 10 V, I
D
= I
T
Notes 2, 3
Advantages
l
Easy assembly
l
l
Space savings
High power density
© 2001 IXYS All rights reserved
98860 (10/01)

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