EEWORLDEEWORLDEEWORLD

Part Number

Search

ALVD-00.7500MHZ-E-K-C

Description
CMOS Output Clock Oscillator, 0.75MHz Nom, ROHS COMPLIANT, CERAMIC, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size1MB,3 Pages
ManufacturerAbracon
Websitehttp://www.abracon.com/index.htm
Environmental Compliance  
Download Datasheet Parametric View All

ALVD-00.7500MHZ-E-K-C Overview

CMOS Output Clock Oscillator, 0.75MHz Nom, ROHS COMPLIANT, CERAMIC, SMD, 6 PIN

ALVD-00.7500MHZ-E-K-C Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Reach Compliance Codecompliant
Other featuresTRI-STATE; ENABLE/DISABLE FUNCTION; SYMMETRY 55/45 ALSO AVAILLABLE; BULK
Maximum control voltage3 V
Minimum control voltage0.3 V
maximum descent time1.6 ns
Frequency Adjustment - MechanicalNO
Frequency offset/pull rate50 ppm
frequency stability30%
Manufacturer's serial numberALVD
Installation featuresSURFACE MOUNT
Nominal operating frequency0.75 MHz
Maximum operating temperature70 °C
Minimum operating temperature-20 °C
Oscillator typeCMOS
Output load10 pF
physical size7.0mm x 5.0mm x 1.8mm
longest rise time1.6 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry40/60 %
Base Number Matches1
CERAMIC SMD CRYSTAL CLOCK OSCILLATOR
WITH VOLTAGE CONTROL
ALVD
Pb
RoHS
Compliant
7.0 x 5.0 x 1.8m m
| | | | | | | | | | | | | |
|
FEATURES:
• Based on a proprietary digital multiplier
• Tri-State Output
• Low Phase Jitter
• 3.3V +/- 5% operation
• Ceramic SMD, low profile package
APPLICATIONS:
• SONET, xDSL
• SDH, CPE
• STB
STANDARD SPECIFICATIONS:
P ARAMETERS
ABRACON P/N:
Frequency range:
Operating temperature:
Storage temperature:
Overall frequency stability:
Supply voltage (V
dd
):
Voltage control (V
C
):
Symmetry at 1/2 Vdd:
Output Level:
Pullability:
Tristate Function:
Aging per year:
RMS Phase Jitter:
Period Jitter (peak to peak):
Phase Noise:
ALVD Series
750 KHz to 800 MHz
0°C to +70°C (see options)
-55°C to +125°C
±50 ppm max. (see options)
3.3V ± 10%
0.3VDC min, 1.65VDC typ, 3.0 VDC max.
40/60% max.
See options (PECL, CMOS, or LVDS)
± 50ppm (see option)
"1" (V
IH
>= 0.7* Vdd) or open: Oscillation
"0" (V
IL
< 0.3* Vdd) : Hi Z
±5 ppm max.
3ps typical, 5ps max. (12KHz~20MHz)
35 ps typical
-112 dBc/Hz @ 1kHz Offset from 155.52MHz
-125 dBc/Hz @ 10kHz Offset from 155.52MHz
-123 dBc/Hz @ 100KHz Offset from 155.52MHz
-109 dBc/Hz @ 1kHz Offset from 622.08MHz
-110 dBc/Hz @ 10kHz Offset from 622.08MHz
-109 dBc/Hz @ 100KHz Offset from 622.08MHz
PECL:
Supply current (I
DD
):
25mA max (for Fo<24MHz),65mA max (for 24MHz<Fo<96MHz),100mA max (96MHz<Fo<800MHz)
Output Logic High: V
dd
-1.025V min, V
dd
-0.880V max.
Output Logic Low: V
dd
-1.810V min. V
dd
-1.620V max.
Symmetry (Duty Cycle): 45% min, 50% typ, 55% max,
Rise time: 0.6nSec typ,1.5nS max
Fall time: 0.6nSec typ, 1.5nS max
CMOS:
Supply current (I
DD
):
15 mA max (for Fo<24MHz),30mA max (for 24MHz<Fo<96MHz), 40mA max (96MHz<Fo<800MHz)
Output Clock Rise/ Fall Time [10%~90% VDD with 10pF load]: 1.2ns typ, 1.6ns max.
Output Clock Duty Cycle [Measured @ 50% VDD]: 45% min, 50% typical, 55% max
LVDS:
Supply current (I
DD
):
25 mA max (for Fo<24MHz),45mA max (for 24MHz<Fo<96MHz),80mA max (96MHz<Fo<800MHz)
Output Clock Duty Cycle @ 1.25V: 45% min, 50% typical, 55% max
Output Differential Voltage (V
OD
): 247mV min, 355mV typical, 454mV max
VDD Magnitude Change (∆V
OD
): -50mV min, 50mV max
Output High Voltage : V
OH
= 1.4V typical, 1.6V max.
Output Low Voltage: V
OL
= 0.9V min, 1.1V typical
Offset Voltage [R
L
= 100 Ω]: V
OS
= 1.125V min, 1.2V typical, 1.375V max
Offset Magnitude Change [R
L
= 100 Ω]: ∆V
OS
= 0mV min, 3mV typical, 25mV max
Power-off Leakage (I
OXD
) [Vout=VDD or GND, VDD=0V] = ±1µA typical, ±10 µA max.
Differential Clock Rise Time (t
r
) [R
L
=100 Ω, CL=10pF]: 0.2nS min, 0.7nS typical, 1.0nS,max
Differential Clock Fall Time (t
f
) [R
L
=100 Ω, CL=10pF]: 0.2nS min, 0.7nS typical, 1.0nS max
ABRACON IS
ISO9001:2008
CERTIFIED
CERTIFIED
Revised: 12.02.10
30332 Esperanza, Rancho Santa Margarita, California 92688
tel 949-546-8000
|
fax 949-546-8001
| www.abracon.com
Visit
www.abracon.com
for Terms & Conditions of Sale
Headhunter Recruitment--European Research Institute Looking for Inverter Research Engineer--Beijing
Job title: Senior Inverter RD Engineer (2-3) - CT BJ Unit: Corporate Technology Location: BeijingGoals/Mission - To provide consultant service on Drive products, mainly about inverters - To carry out ...
yuehu0218 Recruitment
How to clear the output window content in CCS
How to clear the output window inCCS?...
w414878943 DSP and ARM Processors
1602 display problem based on Mega16
#include #include #include #define uchar unsigned char #define uint unsigned int #define RS PORTD.0 #define RW PORTD.1 #define EN PORTD.2 #define lcd_data PORTA #define busy 0x80 void busy_check() // ...
asd046012 Microchip MCU
A pure digital circuit amplifier production example
When it comes to learning electronics, you will think of the various devices in electronic circuits, such as diodes, transistors, amplifier circuits, etc. What does it feel like to use the digital met...
rain Analog electronics
Design and implementation of RDS function based on S1473X
FM radio (FM) has always played a very important role in people's entertainment life. Many manufacturers engaged in consumer electronics design have embedded FM parts in products such as MP3, smart ph...
Jacktang Energy Infrastructure?

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2731  156  1998  1575  1124  55  4  41  32  23 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号