UG42W642(4)8GSG
16M Bytes (2M x 64) DRAM 144Pin SODIMM based on 2M x 8
General Description
The UG42W642(4)8GSG is a 2,096,152 bits by 64
DRAM module.The UG42W642(4)8GSG is assembled
using 8 pcs of 2M x 8 2K/4K refresh DRAMs mounted
on a 144-pin unbuffered printed circuit board.
Features
•
•
•
•
•
•
•
•
•
Single 3.3 +/- 0.3V power supply
Hyper Page Mode (EDO) operations
11/10 \ 12/9 Addressing (Row/Column)
CAS-before-RAS refresh capability
2048/4096 refresh cycles every 32/64 ms
New JEDEC standard proposal with EEPROM
LVTTL compatible inputs and output
Serial PD with EEPROM
PCB:Height (1400mil),single sided component
Pin Assignment
Pin #
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
Signal
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CAS0
CAS1
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
NC
NC
NC
VCC
NC
WE
RAS0
NC
Pin #
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
Signal
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CAS4
CAS5
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
NC
NC
NC
VCC
NC
NC
NC
NC
Pin #
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
Signal
OE
VSS
NC
NC
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CAS2
CAS3
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC
Pin #
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
Signal
NC
VSS
NC
NC
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
NC
VSS
NC
A11
VCC
CAS6
CAS7
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
Absolute Maximum Ratings
-0.5 to +4.6 V
•
Voltage Relative to GND
Operating Temperature
0 to +70 C
•
-55 to +150 C
•
Storage Temperature
50mA
•
Short-circuit Output Current
8.0 W
•
Power Dissipation
Part Identification
Part number
UG42W6428GSG
UG42W6448GSG
PLATING
GOLD
GOLD
Ref.cycle
2K
4K
Pin Names
Pin Name
A0 to 11
A0 to 10
DQ0 - DQ63
WE
RAS0
CAS0 - CAS7
V
CC
V
SS
NC
SDA
SCL
OE
Function
Address Inputs (4K ref.)
Address Inputs (2K ref.)
Data In/Out
Read / Write Enable
Row Address Storbe
Column Address Strobe
Power(+3.3V)
Ground
No Connection
Serial Address / Data I/O
Serial Clock
Output Enable
45388 Warm Springs Blvd. Fremont, CA. 94539 Tel: (510) 668-2088
Fax: (510) 661-2788
support@unigen.com 1 of 7
Re-Tek- 183_KM
UG42W642(4)8GSG
The following information is based on Samsung componet P/N KM48V20(1)04CK only.
ABSOLUTE MAXIMUM RATINGS
Item
Voltage on any pin relative V
SS
Voltage on V
CC
supply relative to V
SS
Storage Temperature
Power Dissipation
Short Circuit Output Current
Symbol
V
IN
, V
OUT
V
CC
T
stg
P
D
I
OS
Rating
-0.5 to +4.6
-0.5 to +4.6
-55 to +150
8
50
Unit
V
V
°C
W
mA
* Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for in tended
periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Item
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
(Voltage referenced to V
SS
, T
A
= 0 to 70°C)
Min
3.0
0
2.0
-0.3
*2
Typ
3.3
0
-
-
Max
3.6
0
V
CC
+0.3
*1
0.8
Unit
V
V
V
V
Symbol
V
CC
V
SS
V
IH
V
IL
*1 : V
CC
+1.3V at pulse width
£
15ns, which is measured at V
CC
.
*2 : -1.3V at pulse width
£
15ns, which is measured at V
SS
.
DC AND OPERATING CHARACTERISTICS
Symbol
I
CC1
I
CC2
I
CC3
I
CC4
I
CC5
I
CC6
I
CC7
I
CCS
I
I(L)
I
O(L)
V
OH
V
OL
I
CC1
I
CC2
I
CC3
I
CC4
I
CC5
I
CC6
I
CC7
:
:
:
:
:
:
:
Speed
-5
-6
ALL
-5
-6
-5
-6
ALL
-5
-6
-
-
ALL
ALL
(Recommended operating conditions unless otherwise noted)
UG42W6428GSG
Min
Max
-
880
-
800
-
8
-
880
-
800
-
720
-
640
-
4
-
880
-
800
-
2.0
-
1.6
-40
40
-5
5
2.4
-
-
0.4
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
uA
uA
V
V
UG42W6448GSG
Min
Max
-
720
-
640
-
8
-
720
-
640
-
640
-
560
-
4
-
720
-
640
-
2.0
-
1.6
-40
40
-5
5
2.4
-
-
0.4
Operating Current * ( RAS, CAS, Address cycling @t
RC
=min)
Standby Current ( RAS=CAS=WE =V
IH
)
RAS Only Refresh Current * ( CAS=V
IH
, RAS cycling @
t
RC
=min)
Extended Data Out Mode Current * ( RAS=V
IL
, CAS cycling : t
HPC
=min)
Standby Current ( RAS=CAS=WE =V
CC
-0.2V)
CAS-Before-RAS Refresh Current * ( RAS and CAS cycling @
t
RC
=min)
Battery back-up current. Average power supply, Battery back-up mode.
Input high voltage(V
IH
)=V
CC
-0.2V, Input low voltage(V
IL
)=0.2V, UCAS,LCAS=0.2V,
Din=Don
¢
t care,
t
RC
=31.25us(4K/L-ver), 62.5us(2K/L-ver),
t
RAS
=
t
RAS
min~300ns)
I
CCS
: Self Refresh Current ( RAS=UCAS=LCAS=V
IL
, WE = OE =A0~A1=V
CC
-0.2V or 0.2V, DQ~DQ63=V
CC
-0.2V or Open)
I
I(L)
: Input Leakage Current (Any input 0
£
V
IN
£
Vcc+0.3V, all other pins not under test=0 V)
<
<
I
O(L)
: Output Leakage Current(Data Out is disabled, 0V
_
V
OUT
_
V
CC
)
V
OH
: Output High Voltage Level (I
OH
= -2mA)
V
OL
: Output Low Voltage Level (I
OL
= 2mA)
* NOTE : I
CC1
, I
CC3
, I
CC4
and I
CC6
are dependent on output loading and cycle rates. Specified values are obtained with the output open.
I
CC
is specified as an average current. In I
CC1
and I
CC3
, address can be changed maximum once while RAS=V
IL
. In I
CC4
,
address can be changed maximum once within one page mode cycle, t
HPC
.
45388 Warm Springs Blvd. Fremont, CA. 94539
Tel: (510) 668-2088
Fax: (510) 661-2788
support@unigen.com
4 of 7
Re-Tek- 183_KM
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