Philips Semiconductors
Product data
Addressable relay driver
NE/SA5090
DESCRIPTION
The NE/SA5090 addressable relay driver is a high-current latched
driver, similar in function to the 9934 address decoder. The device
has 8 open-collector Darlington power outputs, each capable of
150 mA load current. The outputs are turned on or off by
respectively loading a logic “1” or logic “0” into the device data input.
The required output is defined by a 3-bit address. The device must
be enabled by a CE input line which also serves the function of
further address decoding. A common clear input, CLR, turns all
outputs off when a logic “0” is applied. The device is packaged in a
16-pin plastic DIP or SO package.
PIN CONFIGURATION
D
1
, N Packages
A
0
1
A
1
2
A
2
3
Q
0
4
Q
1
5
Q
2
6
Q
3
7
16
15
14
13
12
11
10
9
V
CC
CLR
CE
D
Q
7
Q
6
Q
5
Q
4
FEATURES
GND 8
•
8 high-current outputs
•
Low-loading bus-compatible inputs
•
Power-on clear ensures safe operation
•
Will operate in addressable or demultiplex mode
•
Allows random (addressed) data entry
•
Easily expandable
•
Pin-compatible with 9334 (Philips or Fairchild)
TOP VIEW
NOTE:
1. SOL - Released in Large SO package only.
SL00234
Figure 1. Pin Configuration
APPLICATIONS
•
Relay driver
•
Indicator lamp driver
•
Triac trigger
•
LED display digit driver
•
Stepper motor driver
BLOCK DIAGRAM
CLR
LATCH
LATCH
LATCH
LATCH
A
1
1–OF–8
DECODER
CONTROL
GATE
LATCH
LATCH
LATCH
LATCH
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
CE
A
0
A
2
D
INPUT STAGE
V
CC
OUTPUT STAGE
SL00235
Figure 2. Block Diagram
2001 Aug 03
2
853-0892 26833
Philips Semiconductors
Product data
Addressable relay driver
NE/SA5090
PIN DESIGNATION
PIN NO.
1-3
4-7, 9-12
13
SYMBOL
A
0
-A
2
Q
0
-Q
7
D
NAME AND FUNCTION
A 3-bit binary address on these pins defines which of the 8 output latches is to receive the data.
The 8 device outputs.
The data input. When the chip is enabled, this data bit is transferred to the defined output such that:
“1” turns output switch “ON”
“0” turns output switch “OFF”
14
15
CE
CLR
The chip enable. When this input is low, the output latches will accept data. When CE goes high, all
outputs will retain their existing state, regardless of address of data input condition.
The clear input. When CLR goes low all output switches are turned “OFF”. The high data input will
override the clear function on the addressed latch.
ORDERING INFORMATION
DESCRIPTION
16-Pin Plastic Small Outline Large (SOL) Package
16-Pin Plastic Dual In-Line Package (DIP)
16-Pin Plastic Small Outline Large (SOL) Package
16-Pin Plastic Dual In-Line Package (DIP)
TEMPERATURE RANGE
0
°C
to +70
°C
0
°C
to +70
°C
–40
°C
to +85
°C
–40
°C
to +85
°C
ORDER CODE
NE5090D
NE5090N
SA5090D
SA5090N
DWG #
SOT162–1
SOT38–4
SOT162–1
SOT38–4
TRUTH TABLE
INPUTS
CLR
L
L
L
L
L
L
L
H
H
H
H
H
H
H
CE
H
L
L
L
L
L
L
H
L
L
L
L
L
L
D
X
L
H
L
H
L
H
X
L
H
L
H
L
H
A
0
X
L
L
H
H
H
H
X
L
L
H
H
H
H
A
1
X
L
L
L
L
H
H
X
L
L
L
L
H
H
A
2
X
L
L
L
L
H
H
X
L
L
L
L
H
H
Q
0
H
H
L
H
H
H
H
Q
N-1
H
L
Q
N–1
Q
N–1
Q
N–1
Q
N–1
Q
N–1
Q
N–1
H
L
Q
N–1
Q
N–1
H
L
Addressable Latch
Q
1
H
H
H
H
L
H
H
Q
2
H
H
H
H
H
H
H
OUTPUTS
Q
3
H
H
H
H
H
H
H
Q
4
H
H
H
H
H
H
H
Q
5
H
H
H
H
H
H
H
Q
6
H
H
H
H
H
H
H
Q
7
H
H
H
H
H
H
L
Memory
Demultiplex
Clear
MODE
NOTES:
X=Don’t care condition
Q
N-1
=Previous output state
L=Low voltage level/“ON” output state
H=High voltage level/“OFF” output state
2001 Aug 03
3
Philips Semiconductors
Product data
Addressable relay driver
NE/SA5090
SWITCHING CHARACTERISTICS
V
CC
= 5 V; T
amb
= 25
°C;
V
OUT
= 5 V; I
OUT
= 100 mA; V
IL
= 0.8 V; V
IH
= 2.0 V.
SYMBOL
Propagation delay time
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Low-to-high
1
High-to-low
1
Low-to-high
2
High-to-low
2
Low-to-high
3
High-to-low
3
Low-to-high
4
High-to-low
4
Output
Output
Output
Data
Address
CLR
Output
CE
900
130
920
130
900
130
920
1800
260
1850
260
1800
260
1850
ns
ns
ns
ns
PARAMETER
TO
FROM
MIN
TYP
MAX
UNIT
Switching setup requirements
t
S( )
S(H)
t
S(A)
t
H(H)
( )
t
PW(E)
Set-up time HIGH
Set-up time LOW
Address set-up time
Hold time HIGH
Hold time LOW
Chip enable pulse width
1
Chip enable
Chip enable
Chip enable
Chip enable
Chip enable
High data
Low data
Address
High data
Low data
40
50
40
10
10
40
ns
ns
ns
ns
NOTES:
1. See Turn-On and Turn-Off Delays, Enable-to-Output and Enable Pulse Width timing diagram.
2. See Turn-On and Turn-Off Delays, Data-to-Output timing diagram.
3. See Turn-On and Turn-Off Delays, Address-to-Output timing diagram.
4. See Turn-Off Delay, Clear-to-Output timing diagram.
5. See Set-up and Hold Time, Data-to-Enable timing diagram.
6. See Set-up Time, Address-to-Enable timing diagram.
FUNCTIONAL DESCRIPTION
This peripheral driver has latched outputs which hold the input date
until cleared. The NE5090 has active-LOW, open-collector outputs,
all of which are cleared when power is first applied. This device is
identical to the NE590, except the outputs can withstand 28 V.
dissipation by the device is limited to 0.75 W at room temperature,
and decreases as ambient temperature rises.
The maximum die junction temperature must be limited to 165
°C,
and the temperature rise above ambient and the junction
temperature are defined as:
T
R
=
θ
JA
×
P
D
T
j
= T
amb
+ t
R
For example, if we are using the NE5090 in a plastic package in an
application where the ambient temperature is never expected to rise
above 50
°C,
and the output current at the 8 outputs, when on, are
100, 40, 50, 200, 15, 30, 80, and 10 mA, we find from the graph of
output voltage vs load current that the output voltages are expected
to be about 0.92, 0.75, 0.78, 1.04, 0.5, 0.7, 0.9, and 0.4 V,
respectively. Total device power due to these loads is found to be
473.5 mW. Adding the 200 mW due to the power supply brings total
device power dissipation to 723.5 mW. The thermal resistances are
83
°C
per W for plastic packages. Using the equations above we
find:
Plastic T
R
=83×0.7235=60°C
Plastic T
J
=50+60=100°C
Thus we find that T
J
is below the 165
°C
maximum, and either
package could be used in this application. The graphs of total load
power versus ambient temperature would also give us this same
information, although interpreting the graphs would not yield the
same accuracy.
Addressable Latch Function
Any given output can be turned on or off by presenting the address
of the output to be set or cleared to the three address pins, by
holding the “D” input High to turn on the selected output, or by
holding it Low to turn off, holding the CLR input High, and bringing
the CE input Low. Once an output is turned on or off, it will remain
so until addressed again, or until all outputs are cleared by bringing
the CLR input Low while holding the CE input High.
Demultiplexer Operation
By holding the CLR and CE inputs Low and the ”D“ input High, the
addressed output will remain on and all other outputs will be off.
High Current Outputs
The obvious advantage of this device over other drivers such as the
9334 and N74LS259 is the fact that the outputs of the NE5090 are
each capable of 200 mA and 28 V. It must be noted, however, that
the total power dissipation would be over 2.5 W if all 8 outputs were
on together and carrying 200 mA each. Since the total power
dissipation is limited by the package to 1 W, and since power
dissipation due to supply current is 0.25 W, the total load power
2001 Aug 03
5
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