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IS62VV25616LL-85B

Description
Standard SRAM, 256KX16, 85ns, CMOS, PBGA48, 7.20 X 8.70 MM, MINI, BGA-48
Categorystorage    storage   
File Size90KB,10 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
Download Datasheet Parametric View All

IS62VV25616LL-85B Overview

Standard SRAM, 256KX16, 85ns, CMOS, PBGA48, 7.20 X 8.70 MM, MINI, BGA-48

IS62VV25616LL-85B Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeBGA
package instruction7.20 X 8.70 MM, MINI, BGA-48
Contacts48
Reach Compliance Codecompliant
ECCN code3A991.B.2.A
Maximum access time85 ns
I/O typeCOMMON
JESD-30 codeR-PBGA-B48
JESD-609 codee0
length8.7 mm
memory density4194304 bit
Memory IC TypeSTANDARD SRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of terminals48
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLFBGA
Encapsulate equivalent codeBGA48,6X8,30
Package shapeRECTANGULAR
Package formGRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply1.8 V
Certification statusNot Qualified
Maximum seat height1.3 mm
Maximum standby current0.00001 A
Minimum standby current1.65 V
Maximum slew rate0.015 mA
Maximum supply voltage (Vsup)1.95 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.2 mm
Base Number Matches1
IS62VV25616L/LL
256K x 16 LOW VOLTAGE, 1.8V ULTRA
LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 70, 85, 100 ns
• CMOS low power operation
– 36 mW (typical) operating
– 9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single 1.65V-1.95V V
CC
power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in the 44-pin TSOP (Type II) and
48-pin mini BGA (7.2mm x 8.7mm)
ISSI
DESCRIPTION
®
PRELIMINARY INFORMATION
SEPTEMBER 2000
The
ISSI
IS62VV25616L and IS62VV25616LL are
high-speed, 4,194,304 bit static RAMs organized as
262,144 words by 16 bits. They are fabricated using
ISSI
's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design
techniques, yields high-performance and low power
consumption devices.
For the IS62VV25616L/LL, when
CE
is HIGH (deselected)
or
CE
is low and both
LB
and
UB
are HIGH, the device
assumes a standby mode at which the power dissipation
can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs,
CE
and
OE.
The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS62VV25616L and IS62VV25616LL are packaged in
the JEDEC standard 44-pin TSOP (Type II) and 48-pin
mini BGA (7.2mm x 8.7mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 16
MEMORY ARRAY
VCC
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
This document contains PRELIMINARY INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the
best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION
10/05/00
Rev. 00B
1
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