UPD424268LA-60 datasheet, PDF - EEWORLD Datasheet

UPD424268LA-60: DescriptionIC,DRAM,STATIC COL,256KX4,CMOS,SOJ,20PIN,PLASTIC; Categorystorage storage; File Size335KB，16 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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UPD424268LA-60 Overview

IC,DRAM,STATIC COL,256KX4,CMOS,SOJ,20PIN,PLASTIC

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	SOJ
package instruction	SOJ,
Contacts	20
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	STATIC COLUMN
Maximum access time	60 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
JESD-30 code	R-PDSO-J20
length	17.4 mm
memory density	1048576 bit
Memory IC Type	STATIC COLUMN DRAM
memory width	4
Number of functions	1
Number of ports	1
Number of terminals	20
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256KX4
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOJ
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Certification status	Not Qualified
refresh cycle	512
Maximum seat height	3.7 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	DUAL
width	7.57 mm
Base Number Matches	1

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