®
FAST CMOS OCTAL
BIDIRECTIONAL
TRANSCEIVERS
DESCRIPTION:
IDT54/74FCT245/A/C
IDT54/74FCT640/A/C
IDT54/74FCT645/A/C
Integrated Device Technology, Inc.
FEATURES:
• IDT54/74FCT245/640/645 equivalent to FAST™ speed
and drive
• IDT54/74FCT245A/640A/645A 25% faster than FAST
• IDT54/74FCT245C/640C/645C 40% faster than FAST
• TTL input and output level compatible
• CMOS output level compatible
• I
OL
= 64mA (commercial) and 48mA (military)
• Input current levels only 5µA max.
• CMOS power levels (2.5mW typical static)
• Direction control and over-riding 3-state control
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B and
DESC listed
• Meets or exceeds JEDEC Standard 18 specifications
The IDT octal bidirectional transceivers are built using an
advanced dual metal CMOS technology. The IDT54/
74FCT245/A/C, IDT54/74FCT640/A/C and IDT54/74FCT645/
A/C are designed for asynchronous two-way communication
between data buses. The transmit/receive (T/
R
) input deter-
mines the direction of data flow through the bidirectional
transceiver. Transmit (active HIGH) enables data from A
ports to B ports, and receive (active LOW) from B ports to A
ports. The output enable (
OE
) input, when HIGH, disables
both A and B ports by placing them in High-Z condition.
The IDT54/74FCT245/A/C and IDT54/74FCT645/A/C
transceivers have non-inverting outputs. The IDT54/
74FCT640/A/C has inverting outputs.
FUNCTIONAL BLOCK DIAGRAM
T/R
OE
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
PIN CONFIGURATIONS
T/R
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
P20-1
D20-1
SO20-2
&
E20-1
17
16
15
14
13
12
11
Vcc
OE
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
DIP/SOIC/CERPACK
TOP VIEW
INDEX
B
4
A
5
B
5
A
6
B
6
A
7
B
7
NOTES:
1. FCT245, 645 are noninverting options.
2. FCT640 is the inverting option.
2534 drw 02
A
2
A
3
A
4
A
5
A
6
A
1
A
0
T/R
Vcc
OE
3 2
4
5
6
7
8
A
4
L20-2
20 19
18
1
17
16
15
14
9 10 11 12 13
B
0
B
1
B
2
B
3
B
4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a registered trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992
Integrated Device Technology, Inc.
A
7
GND
B
7
B
6
B
5
LCC
TOP VIEW
2534 drw 01
MAY 1992
DSC-4201/3
7.9
1
IDT54/74FCT245/A/C, IDT54/74FCT640/A/C, IDT54/74FCT645/A/C
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or 3-State Outputs
Side B Inputs or 3-State Outputs
2534 tbl 05
FUNCTION TABLE
(2)
Inputs
OE
T/
R
A
0
–A
7
B
0
–B
7
OE
L
L
H
T/
R
L
H
X
Outputs
Bus B Data to Bus A
(1)
Bus A Data to Bus B
(1)
High Z State
2534 tbl 06
NOTES:
1. 640 is inverting from input to output.
2. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
(2)
V
TERM
Terminal Voltage
with Respect
to GND
V
TERM(3)
Terminal Voltage
with Respect
to GND
T
A
Operating
Temperature
T
BIAS
Temperature
Under Bias
T
STG
Storage
Temperature
P
T
Power Dissipation
DC Output Current
I
OUT
Commercial
–0.5 to +7.0
Military
Unit
–0.5 to +7.0 V
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
C
I/O
Parameter
(1)
Input Capacitance
I/O Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ. Max. Unit
6
8
10
12
pF
pF
tbl 02
–0.5 to V
CC
–0.5 to V
CC
V
NOTE:
2534
1. This parameter is measured at characterization but not tested.
0 to +70
–55 to +125
–55 to +125
0.5
120
–55 to +125
–65 to +135
–65 to +150
0.5
120
°C
°C
°C
W
mA
NOTES:
2534 tbl 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed V
CC
by +0.5V unless otherwise noted.
2. Inputs and V
CC
terminals.
3. Outputs and I/O terminals.
7.9
2
IDT54/74FCT245/A/C, IDT54/74FCT640/A/C, IDT54/74FCT645/A/C
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
IH
I
IL
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(Except I/O pins)
Input LOW Current
(Except I/O pins)
Input HIGH Current
(I/O pins only)
Input LOW Current
(I/O pins only)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
(Port A and Port B)
I
OH
= –300µA
I
OH
= –12mA MIL.
I
OH
= –15mA COM’L.
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 300µA
I
OL
= 48mA MIL.
I
OL
= 64mA COM’L.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
Min.
2.0
—
—
—
—
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
15
15
(4)
–15
(4)
–15
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.55
0.55
2534 tbl 03
Unit
V
V
µA
V
CC
= Max
µA
V
mA
V
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
7.9
3
IDT54/74FCT245/A/C, IDT54/74FCT640/A/C, IDT54/74FCT645/A/C
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
Vcc = Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
Vcc = Max.
V
IN
= 3.4V
(3)
Vcc = Max.
Outputs Open
OE
= GND
T/
R
= GND or V
CC
One Input Toggling
50% Duty Cycle
Vcc = Max.
Outputs Open
f
i
= 10MHz
50% Duty Cycle
T/
R
=
OE
= GND
One Bit Toggling
Vcc = Max.
Outputs Open
f
i
= 2.5MHz
50% Duty Cycle
T/
R
=
OE
= GND
Eight Bits Toggling
V
IN
≥
V
HC
V
IN
≤
V
LC
Min.
—
—
—
Typ.
(2)
0.5
0.5
0.15
Max.
1.5
2.0
0.25
Unit
mA
mA
mA/MHz
I
C
Total Power Supply Current
(6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
2.0
4.0
mA
—
2.3
5.0
—
3.5
6.5
(5)
—
5.5
14.5
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
2534 tbl 04
7.9
4
IDT54/74FCT245/A/C, IDT54/74FCT640/A/C, IDT54/74FCT645/A/C
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE FOR FCT245/A/C
54/74FCT245
Com’l.
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay
A to B, B to A
Output Enable Time
OE
to A or B
Output Disable Time
OE
to A or B
Output EnableTime
T/
R
to A or B
(3)
Output Disable Time
T/
R
to A or B
(3)
Condition
(1)
54/74FCT245A
Com’l.
(2)
54/74FCT245C
Com’l.
Min.
(2)
Mil.
(2)
Mil.
(2)
Mil.
(2)
Min.
(2)
Max. Min.
Max. Min.
Max. Min.
Max.
Max. Min
.
Max.
Unit
C
L
= 50 pF
R
L
= 500Ω
1.5
1.5
1.5
1.5
1.5
7.0
9.5
7.5
9.5
7.5
1.5
1.5
1.5
1.5
1.5
7.5
10.0
10.0
10.0
10.0
1.5
1.5
1.5
1.5
1.5
4.6
6.2
5.0
6.2
5.0
1.5
1.5
1.5
1.5
1.5
4.9
6.5
6.0
6.5
6.0
1.5
1.5
1.5
1.5
1.5
4.1
5.8
4.8
5.8
4.8
1.5
1.5
1.5
1.5
1.5
4.5
6.2
5.2
6.2
5.2
ns
ns
ns
ns
ns
2534 tbl 07
SWITCHING CHARACTERISTICS OVER OPERATING RANGE FOR FCT640/A/C
54/74FCT640
Com’l.
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay
A to B, B to A
Output Enable Time
OE
to A or B
Output Disable Time
OE
to A or B
Output Enable Time
T/
R
to A or B
(3)
Output Disable Time
T/
R
to A or B
(3)
C
L
= 50 pF
R
L
= 500Ω
2.0
2.0
2.0
2.0
2.0
7.0
13.0
10.0
13.0
10.0
Mil.
2.0
2.0
2.0
2.0
2.0
8.0
16.0
12.0
16.0
12.0
54/74FCT640A
Com’l.
1.5
1.5
1.5
1.5
1.5
5.0
6.2
5.0
6.2
5.0
1.5
1.5
1.5
1.5
1.5
Mil.
5.3
6.5
6.0
6.5
6.0
54/74FCT640C
Com’l.
1.5
1.5
1.5
1.5
1.5
4.4
5.8
4.8
5.8
4.8
Mil.
1.5
1.5
1.5
1.5
1.5
4.7
6.2
5.2
6.2
5.2
ns
ns
ns
ns
ns
2534 tbl 08
Condition
(1)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min
.
(2)
Max.
Unit
SWITCHING CHARACTERISTICS OVER OPERATING RANGE FOR FCT645/A/C
54/74FCT645
Com’l.
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay
A to B, B to A
Output Enable Time
OE
to A or B
Output Disable Time
OE
to A or B
Output Enable Time
T/
R
to A or B
(3)
Output Disable Time
T/
R
to A or B
(3)
Condition
(1)
54/74FCT645A
Com’l.
(2)
54/74FCT645C
Com’l.
(2)
Mil.
(2)
Mil.
(2)
Mil.
(2)
Min.
(2)
Max. Min.
Max. Min.
Max. Min.
Max. Min.
Max. Min
.
Max.
Unit
C
L
= 50 pF
R
L
= 500Ω
1.5
1.5
1.5
1.5
1.5
9.5
11.0
12.0
11.0
12.0
1.5
1.5
1.5
1.5
1.5
11.0
12.0
13.0
12.0
13.0
1.5
1.5
1.5
1.5
1.5
4.6
6.2
5.0
6.2
5.0
1.5
1.5
1.5
1.5
1.5
4.9
6.5
6.0
6.5
6.0
1.5
1.5
1.5
1.5
1.5
4.1
5.8
4.8
5.8
4.8
1.5
1.5
1.5
1.5
1.5
4.5
6.2
5.2
6.2
5.2
ns
ns
ns
ns
ns
2534 tbl 09
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
7.9
5
京公网安备 11010802033920号
EEWORLD
