1. Features
•
Medium-voltage and Standard-voltage Operation
•
•
•
•
•
•
•
•
•
•
•
– 2.5 (V
CC
= 2.5V to 5.5V)
Automotive Temperature Range –40°C to 125°C
Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K) or 1024 x 8 (8K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
400 kHz (2.5V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page (1K, 2K) or 16-byte Page (4K, 8K) Write Modes
Partial Page Writes are Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
8-lead JEDEC SOIC and 8-lead TSSOP Packages
Two-wire
Automotive
Temperature
Serial EEPROM
1K (128 x 8)
2K (256 x 8)
4K (512 x 8)
8K (1024 x 8)
•
2. Description
The AT24C01B/02B/04B/08B provides 1024/2048/4096/8192 bits of serial electrically
erasable and programmable read-only memory (EEPROM) organized as
128/256/512/1024 words of 8 bits each. The device is optimized for use in many auto-
motive applications where low-power and low-voltage operation are essential. The
AT24C01B/02B/04B/08B is available in space-saving 8-lead JEDEC SOIC and 8-lead
TSSOP packages and is accessed via a two-wire serial interface. In addition, the
entire family is available in 2.5V (2.5V to 5.5V) versions.
8-lead SOIC
Table 2-1.
Pin Name
A0
−
A2
SDA
SCL
WP
Pin Configurations
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
A0
A1
A2
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
AT24C01B
AT24C02B
AT24C04B
AT24C08B
8-lead TSSOP
A0
A1
A2
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
8517C–SEEPR–01/09
3. Absolute Maximum Ratings
Operating Temperature...........................−55°C to +125°C
Storage Temperature..............................−65°C to +150°C
Voltage on Any Pin
with Respect to Ground..................................−1.0V to +7.0V
Maximum Operating Voltage..........................................6.25V
DC Output Current........................................................5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Figure 3-1.
Block Diagram
VCC
GND
WP
SCL
SDA
START
STOP
LOGIC
LOAD
DEVICE
ADDRESS
COMPARATOR
A
2
A
1
A
0
R/W
COMP
SERIAL
CONTROL
LOGIC
EN
H.V. PUMP/TIMING
DATA RECOVERY
INC
X DEC
EEPROM
LOAD
DATA WORD
ADDR/COUNTER
Y DEC
SERIAL
MUX
D
IN
D
OUT
D
OUT
/ACK
LOGIC
2
AT24C01B/02B/04B/08B
8517C–SEEPR–01/09
AT24C01B/02B/04B/08B
4. Pin Description
SERIAL CLOCK (SCL):
The SCL input is used to positive edge clock data into each EEPROM
device and negative edge clock data out of each device.
SERIAL DATA (SDA):
The SDA pin is bi-directional for serial data transfer. This pin is open-
drain driven and may be wire-ORed with any number of other open-drain or open-collector
devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0):
The A2, A1 and A0 pins are device address inputs
that are hard wired for the AT24C01B/02B/04B. As many as eight 1K/2K devices may be
addressed on a single bus system (device addressing is discussed in detail under the Device
Addressing section). The AT24C04B uses the A2 and A1 inputs for hardwire addressing and a
total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect.
The AT24C08B only uses the A2 input for hardwire addressing and a total of two 8K devices
may be addressed on a single bus system. The A0 and A1 pins are no connect.
WRITE PROTECT (WP):
The AT24C01B/02B/04B/08B has a Write Protect pin that provides
hardware data protection. The Write Protect pin allows normal read/write operations when con-
nected to ground (GND). When the Write Protect pin is connected to V
CC
, the write protection
feature is enabled and operates as shown in the following table.
Table 4-1.
WP Pin
Status
At V
CC
At GND
Write Protect
Part of the Array Protected
AT24C01B/02B/04B/08B
Full Array
Normal Read/Write Operations
5. Memory Organization
AT24C01B, 1K SERIAL EEPROM:
Internally organized with 16 pages of 8 bytes each, the 1K
requires a 7-bit data word address for random word addressing.
AT24C02B, 2K SERIAL EEPROM:
Internally organized with 32 pages of 8 bytes each, the 2K
requires an 8-bit data word address for random word addressing.
AT24C04B, 4K SERIAL EEPROM:
Internally organized with 32 pages of 16 bytes each, the 4K
requires a 9-bit data word address for random word addressing.
AT24C08B, 8K SERIAL EEPROM:
Internally organized with 64 pages of 16 bytes each, the 8K
requires a 10-bit data word address for random word addressing.
3
8517C–SEEPR–01/09
Table 5-1.
Pin Capacitance
(1)
Applicable over recommended operating range from T
A
= 25°C, f = 400 KHz, V
CC
= +2.5V
Symbol
C
I/O
C
IN
Note:
Test Condition
Input/Output Capacitance (SDA)
Input Capacitance (A
0
, A
1
, A
2
, SCL)
1. This parameter is characterized and is not 100% tested.
Max
8
6
Units
pF
pF
Conditions
V
I/O
= 0V
V
IN
= 0V
Table 5-2.
DC Characteristics
Applicable over recommended operating range from: T
A
=
−40°C
to +125°C, V
CC
= +2.5V to +5.5V (unless otherwise noted)
Symbol
V
CC1
I
CC
I
CC
I
SB1
I
SB2
I
LI
I
LO
V
IL
V
IH
V
OL
Note:
Parameter
Supply Voltage
Supply Current V
CC
= 5.0V
Supply Current V
CC
= 5.0V
Standby Current V
CC
= 2.5V
Standby Current V
CC
= 5.0V
Input Leakage Current
Output Leakage Current
Input Low Level
(1)
Input High Level
(1)
Output Low Level V
CC
= 2.5V
I
OL
= 3.0 mA
Read at 100 kHz
Write at 100 kHz
V
IN
= V
CC
or V
SS
V
IN
= V
CC
or V
SS
V
IN
= V
CC
or V
SS
V
OUT
= V
CC
or V
SS
−0.6
V
CC
x 0.7
Test Condition
Min
2.5
0.4
2.0
1.6
8.0
0.10
0.05
Typ
Max
5.5
1.0
3.0
4.0
18.0
3.0
3.0
V
CC
x 0.3
V
CC
+ 0.5
0.4
Units
V
mA
mA
µA
µA
µA
µA
V
V
V
1. V
IL
min and V
IH
max are reference only and are not tested.
4
AT24C01B/02B/04B/08B
8517C–SEEPR–01/09
AT24C01B/02B/04B/08B
Table 5-3.
AC Characteristics
Applicable over recommended operating range from T
A
=
−40°C
to +125°C, V
CC
= +2.5V to +5.5V, CL = 1 TTL Gate and
100 pF (unless otherwise noted)
Symbol
f
SCL
t
LOW
t
HIGH
t
I
t
AA
t
BUF
t
HD.STA
t
SU.STA
t
HD.DAT
t
SU.DAT
t
R
t
F
t
SU.STO
t
DH
t
WR
Endurance
(2)
Notes:
Parameter
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time
(1)
Clock Low to Data Out Valid
Time the bus must be free before
a new transmission can start
(2)
Start Hold Time
Start Set-up Time
Data In Hold Time
Data In Set-up Time
Inputs Rise Time
(2)
Inputs Fall Time
(2)
Stop Set-up Time
Data Out Hold Time
Write Cycle Time
5.0V, 25°C, Page Mode
1M
0.6
50
5
0.1
1.2
0.6
0.6
0
100
300
300
1.2
0.6
50
0.9
Min
Max
400
Units
kHz
µs
µs
ns
µs
µs
µs
µs
µs
ns
ns
ns
µs
ns
ms
Write Cycles
1. This parameter is characterized and is not 100% tested (T
A
= 25°C).
2. This parameter is characterized only.
5
8517C–SEEPR–01/09
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