TLP2118E
TOSHIBA PHOTOCOUPLER
GaAℓAs Ired & PHOTO-IC
TLP2118E
PDP (Plasma Display Panel)
FA (Factory Automation)
Interfaces of measuring and control instruments
The Toshiba TLP2118E provides superior cost performance. The TLP2118E
consists of GaAℓAs infrared light emitting diodes and integrated high-gain,
high-speed photodetectors.
Since the TLP2118E contains two photocouplers in the SO8 package, it
saves board space.
The photodetector has an internal Faraday shield that provides a guaranteed
common-mode transient immunity of ±15 kV/μs.
8
7
6
5
Unit: mm
1
2
3
4
6.0
±
0.2
0.1
±
0.1 2.5
±
0.2
5.1
±
0.2
Inverter logic type (Open collector output)
Package: SO8
Guaranteed performance over -40 to 100°C
Power supply voltage: 4.5 to 5.5 V
Input threshold current: IFH = 5.0 mA (max)
Propagation delay time tpHL/tpLH: 75 ns (max)
Common-mode transient immunity: ±15 kV/μs (min)
Isolation voltage: 2500 Vrms (min)
UL recognized
UL1577, File No.E67349
cUL recognized
CSA Component Acceptance Service No. 5A, File No.E67349
VDE-approved: Option (V4) EN60747-5-2 (Note)
0.38
3.95
±
0.25
1.27
±
0.15
0.305 min
11-5K1
JEDEC
―
JEITA
―
TOSHIBA
11−5K1
Weight: 0.11 g (Typ.)
Note: When an EN60747-5-2 approved type is needed, please designate the Option (V4).
Pin Configuration (Top View)
Schematic
ICC
IF-1
1+
VF-1
2−
SHIELD
IO2
3−
VF-2
4+
IF-2
SHIELD
5 GND
6 VO-2
IO1
8 VCC
7 VO-1
1
2
3
4
VCC
8
7
6
GND
SHIELD
5
1: ANODE 1
2: CATHODE 1
3: CATHODE 2
4: ANODE 2
5: GND
6: VO2 (Output 2)
7: VO1 (Output 1)
8: VCC
Truth Table
Input
H
L
LED1(2)
ON
OFF
Output 1(2)
L
H
1
2012-08-30
TLP2118E
Absolute Maximum Ratings (Ta=25°C)
CHARACTERISTIC
Forward Current
Forward Current Derating (Ta
≥
90°C)
LED
Peak Transient Forward Current
(Note 1, 2)
(Note 1)
SYMBOL
IF
ΔI
F /°C
IFPT
ΔI
FPT /°C
VR
IO
VO
VCC
(Note 1)
PO
ΔP
O /°C
Topr
Tstg
(10 s)
(Note 3)
Tsol
BVs
RATING
20
-0.6
40
-1.0
5
25
6
6
40
-0.2
-40 to 100
-55 to 125
260
2500
UNIT
mA
mA/°C
mA
mA/°C
V
mA
V
V
mW
mW/°C
°C
°C
°C
Vrms
Peak Transient Forward Current Derating (Ta
≥
85°C)
Reverse Voltage
Output Current
DETECTOR
Output Voltage
Supply Voltage
Output Power Dissipation
Output Power Dissipation Derating (Ta
≥
25°C)
Operating Temperature Range
Storage Temperature Range
Lead Soldering Temperature
Isolation Voltage (AC,1 min.,R.H.
≤
60%,Ta=25°C)
(Ta
≤
100°C)
(Note 1)
(Note 1)
(Note 1)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Each channel.
Note 2: Pulse width
≤
1 ms, duty = 50%.
Note 3: This device is regarded as a two terminal device: pins 1, 2, 3 and 4 are shorted together,
as are pins 5, 6, 7 and 8.
Recommended Operating Conditions
CHARACTERISTIC
Input Current , High Level
Input Voltage , Low Level
Supply Voltage*
Operating Temperature
SYMBOL
IFH
VFL
VCC
Topr
MIN
7.5
0
4.5
-40
TYP.
-
-
-
-
MAX
14
0.8
5.5
100
UNIT
mA
V
V
°C
* This item denotes operating range, not meaning of recommended operating conditions.
Note: Recommended operating conditions are given as a design guideline to obtain expected performance of the
device. Additionally, each item is an independent guideline respectively. In developing designs using this
product, please confirm specified characteristics shown in this document.
2
2012-08-30
TLP2118E
Electrical Characteristics
(Unless otherwise specified, Ta=-40 to 100°C, VCC=4.5 to 5.5 V)
CHARACTERISTIC
Input Forward Voltage
Temperature Coefficient
of Forward Voltage
Input Reverse Current
Input Capacitance
Logic High Output Current
SYMBOL
VF
ΔV
F/ΔTa
IR
CT
IOH
VOL
TEST
CIRCUIT
-
-
-
-
1
Test Condition
IF = 10 mA, Ta = 25°C
IF = 10 mA
VR = 5V, Ta = 25°C
V = 0V, f = 1 MHz, Ta = 25°C
VF = 0.8 V, VO = 5.5 V
Ta=25°C
IF = 10 mA, IO = 13 mA (Sinking)
MIN
1.4
-
-
-
-
-
-
TYP.
1.57
-2.0
-
60
-
0.5
0.25
MAX
1.8
-
10
-
250
10
0.6
UNIT
V
mV/°C
μA
pF
μA
Logic Low Output Voltage
2
V
Logic Low Supply Current
Logic High Supply Current
“H Level Output to L Level
Output” Input Current
ICCL
ICCH
IFH
3
4
-
IF1 = IF2 = 10 mA
IF = 0 mA
IO = 13mA (Sinking), VO < 0.6V
-
-
-
3
3
1.0
10
10
5.0
mA
mA
mA
*
All typical values are at Ta = 25°C, VCC = 5V unless otherwise specified
Isolation Characteristics
(Ta = 25°C)
Characteristic
Capacitance input to output
Isolation resistance
Symbol
CS
RS
Test Condition
VS = 0V, f = 1 MHz
R.H.
≤
60%,V
S
= 500 V
AC,1 minute
Isolation voltage
BVS
AC,1 second,in oil
DC,1 minute,in oil
(Note 3)
Min
―
12
Typ.
0.8
10
14
Max
―
―
―
―
―
Unit
pF
Ω
Vrms
Vdc
(Note 3) 1×10
2500
―
―
―
5000
5000
3
2012-08-30
TLP2118E
Switching Characteristics
(Unless otherwise specified, Ta=-40 to 100°C, VCC=4.5 ~ 5.5 V)(Each Channel)
CHARACTERISTIC
Propagation Delay Time
to Logic Low output
Propagation Delay Time
to Logic High output
Switching Time Dispersion
between ON and OFF
Propagation Delay Skew (Note 5)
Fall Time (90 – 10 %)
Rise Time (10 – 90 %)
Common Mode transient
Immunity at High Level Output
Common Mode transient
Immunity at Low Level Output
*All typical values are at Ta=25°C
SYMBOL
tpHL
tpLH
|tpHL-
tpLH|
tpsk
tf
tr
CMH
6
CML
IF = 0→7.5 mA
IF = 7.5→0 mA
5
TEST
CIRCUIT
Test Condition
IF = 0→7.5 mA
IF = 7.5→0 mA
RL=350Ω
CL=15pF
(Note 4)
RL=350Ω,
IF = 0↔7.5 mA
CL=15pF
(Note 4)
RL=350Ω
CL=15pF
(Note 4)
-
15
-15
30
-
-
-
-
-
ns
kV/μs
kV/μs
-
35
75
ns
MIN.
-
TYP.
35
MAX.
75
UNIT
ns
-
-50
-
-
-
30
35
50
-
ns
ns
ns
VCM=1000 V
p-p
, IF=0 mA,
VCC=5 V , Ta=25°C
VCM=1000 Vp-p, IF=10 mA,
VCC=5 V , Ta=25°C
Note:
A ceramic capacitor (0.1
μF)
should be connected from pin 8 (VCC) to pin 5 (GND) to stabilize the operation
of the high gain linear amplifier. Failure to provide the bypass may impair the switching property.
The total lead length between capacitor and coupler should not exceed 1 cm.
Note4: f = 5MHz, duty = 50%, input current tr = tf = 5ns,
CL is approximately 15pF which includes probe and Jig/stray wiring capacitance.
Note 5: Propagation delay skew is defined as the difference between the largest and smallest propagation delay
times (i.e. tpHL or tpLH) of multiple samples. Evaluations of these samples are conducted under identical
test conditions (supply voltage, input current, temperature, etc).
TEST CIRCUIT 1: IOH Test Circuit
VF
TEST CIRCUIT 2: VOL Test Circuit
1
2
A
VCC
VCC
1
2
3
4
GND
SHIELD
VCC
8
7
6
5
0.1
μF
IF
8
7
6
GND
SHIELD
0.1
μF
IO
V
VOL VCC
IOH
VO
3
4
5
TEST CIRCUIT 3: ICCL Test Circuit
IF1
TEST CIRCUIT 4: ICCH Test Circuit
1
2
VCC
1
VCC
8
7
6
GND
SHIELD
ICCL
A
8
7
6
GND
SHIELD
ICCH
A
2
3
4
IF2
0.1
μF
VCC
3
4
0.1
μF
VCC
5
5
4
2012-08-30
TLP2118E
TEST CIRCUIT 5: Switching Time Test Circuit
IF=7.5mA(P.G)
(f=5MHz , duty=50%, tr=tf= less than 5ns)
1
P.G.
IF monitor
2
3
4
*CL=15pF
GND
SHIELD
RIN=100Ω
CL includes probe and stray capacitance.
P.G.: Pulse generator
V
CC
7
6
5
8
0.1uF
RL=350Ω
VO
*CL=15pF
IF
tpHL
VO
VCC
VOL
1.5 V
tf
tr
tpLH
50%
90%
10%
TEST CIRCUIT 6: Common-Mode Transient Immunity Test Circuit
IF
SW
A
B
→
1
2
3
4
IELD
VCC
8
7
6
90%
1000 V
RL=350Ω
VCM
10%
VO
0.1
μF
VCC
・SW
B : IF=0 mA
VO
・SW
A : IF=10 mA
tr
tf
CMH
2V
0.8 V
CML
GND
5
＋
VCM
－
CM
H
=
800(
V
)
t r
(
μ
s
)
CM
L
=
800(
V
)
t f
(
μ
s
)
5
2012-08-30
Embedded System
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