IMI145152
February 1996
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL TUNING PLL FREQUENCY SYNTHESIZER
PRODUCT DESCRIPTION
The IMI145152 is a member of a family of phase lock loop
synthesizer Ics from International Microcicruicts. This part is
pin-for-pin compatible with the Motorola MC145152 series of
parts. The IMI145152 is an improved version of this device,
and designing to take advantage of these improvements will
provide a synthesizer with noticeably improved performance.
The IMI145152 is programmed with parallel input data lines.
Since it does not require a microcontroller as serial and bus
programming units do, the IMI145152 is an excellent choice
for synthesizers requiring independence from digital
controllers. Such applications particularly include fixed local
oscillator signals, who tuning never changes, and signal
sources, which have few operating frequencies.
Blocks in the IMI145152 include a dual modulus feedback
divider for use with an external dual modulus prescaler.
Prescaler ratios can very from 3/4 through 64/65. The
reference divider is set by three select lines to one of eight
ROM encloded values. Both counter inputs are biased for
high sensitivity to sinewave input signals, and the reference
divider input is also configured to operate as an oscillator if
desired. The phase detector is a Type IV phase-frequency
design, which has inherently eliminated the dead zone and
indeed any crossover distortion, as is often noticed on other
PLL devices.
Performance improvements are in the operating
and phase detector noise floor. With its extremely
noise floor and wider input bandwidth, prescaler
be minimized to allow wide loop bandwidths
settlign and lower phase noise.
bandwidth
low phase
ratios can
for faster
PRODUCT FEATURES
æ
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> 150 Mhz typical input frequency
-163 dBc/Hz total phaswe noise floor
No dead zone, by design
Unambiguous PLL acquisition
Parrallel programming, dual modulus PLL
8 user-selectable reference divider ratios: 8, 64,
128, 256, 512, 1024, 1160, and 2048
Lock detect signal
Compatible with dual-modulus prescalers from
÷3/4
to
÷64/65
10-bit N counter, 6-bit A counter
On- or off-chip reference oscillator operation
3-volt and 5-volt characterizations
BLOCK DIAGRAM
RA2
RA1
RA0
6
5
4
12 x 8 ROM REFERENCE DECODER
LOCK
DETECT
28
LD
OSCin
27
12 BIT /R COUNTER
PHASE DETECTOR
8
7
PHIV
PHIR
OSCout
26
CONTROL LOGIC
FIN
1
9
6 BIT /A COUNTER
10 BIT /N COUNTER
MODULUS CONTROL
10
A5
25
A4
24
A3
22
A2
21
A1
23
A0
11
N0
12
N1
13
N2
14
N3
15
16
17
18
19
N8
20
N9
VDD = PIN 3
VSS = PIN 2
N4 N5
N6 N7
Note: N0 through N9 have pullup resistors not shown.
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 FAX 408-263-6571
Page 1 of 12
IMI145152
February 1996
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL TUNING PLL FREQUENCY SYNTHESIZER
MAXIMUM RATINGS
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
field; however, precautions should be taken to avoid
application of any voltage higher than the maximum
reated voltages to this circuit. For proper operation, Vin
and Vout should be constrained to the range:
V
SS
< (Vin or Vout) < V
DD
Unused inputs must always be tied to an appropriate
logic voltage level (either V
SS
or V
DD
).
Voltage Relative to VSS:
Voltage Relative to VDD:
Storage Temperature:
Ambient Temperature:
-0.3V to 7V
0.3V
-65°C to 150°C
-55°C to 125°C
PIN DESCRIPTIONS
PinNo.
1
Name
Fin
Description
Feedback divider input signal. Applied to both the N and A positive edge triggered counters, this
signal is intended to be AC coupled. For CMOS logic level input signals, DC coupling can be
used.
Circuit ground.
Circuit positive power supply.
The three reference divisor ratio select pins. Pull-up resistors RA1 are included on each of these
pins to insure that, if left RA2 unconnected, they will raimain at a logic ONE. The reference
divider ratio is set accourding to the following table
RA2
0
0
0
0
1
1
1
1
RA1
0
0
1
1
0
0
1
1
RA0
0
1
0
1
0
1
0
1
Reference Divider Ratio
8
64
128
256
512
1024
1160
2048
2
3
4
5
6
Vss
Vdd
RA0
RA1
RA2
7
8
9
10
11
PHIR
PHIV
MC
A5
N0
Phase detector output. This signal goes LOW when the feedback frequency is too low.
Phase detector output. This signal goes LOW when the feedback frequency is too high.
Prescaler modulus control output signal. MC is HIGH when the prescaler is to devide by its base
modulus (P). MC is LOW when the prescaler is to divide by P+1.
MSB of the A counter programming input bits. Pull-up resistor included.
LSB of the N counter programming input bits. Pull-up resistor included.
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 FAX 408-263-6571
Page 2 of 12
IMI145152
February 1996
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL TUNING PLL FREQUENCY SYNTHESIZER
PIN DESCRIPTIONS (Cont.)
PinNo.
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Name
N1
N2
N3
N4
N5
N6
N7
N8
N9
A1
A2
A0
A3
A4
OSCout
OSCin
LD
Description
LSB + 1 of the N counter programming input bits. Pull-up resistor included.
LSB + 2 of the N counter programming input bits. Pull-up resistor included.
LSB + 3 of the N counter programming input bits. Pull-up resistor included
LSB + 4 of the N counter programming input bits. Pull-up resistor included
LSB + 5 of the N counter programming input bits. Pull-up resistor included
LSB + 6 of the N counter programming input bits. Pull-up resistor included
LSB + 7 of the N counter programming input bits. Pull-up resistor included
LSB + 8 of the N counter programming input bits. Pull-up resistor included
MSB of the N counter programming input bits. Pull-up resistor included
LSB + 1 of the A counter programming input bits. Pull-up resistor included
LSB + 2 of the A counter programming input bits. Pull-up resistor included
LSB of the A counter programming input bits. Pull-up resistor included
LSB + 3 of the A counter programming input bits. Pull-up resistor included
LSB + 4 of the A counter programming input bits. Pull-up resistor included
Reference signal output or output of the oscilator inverter.
AC-coupled reference signal input or input to the oscillator inverter.
Lock detect output. When the PLL is locked, this signal will be essentially HIGH, with very narrow
negative spikes at the phase detection frequency. If the PLL is out of lock, this signal will pulse
LOW.
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 FAX 408-263-6571
Page 3 of 12
IMI145152
February 1996
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL TUNING PLL FREQUENCY SYNTHESIZER
PLL OPERATING CHARACTERISTICS
VDD = 5 VOLTS
-40ºC
Characteristics
fin,
Operating
Frequency
Modulus
Control Prop.
Dealy
Dynamic
0ºC
Min
170
170
Max
-
-
Min
160
160
25ºC
Typ
180
200
Max
-
-
70ºC
Min
150
150
Max
-
-
85ºC
Min
140
140
Max
-
-
Unit
Mhz
Mhz
Mhz
Conditions
Symbol
Sine
Square
fosc
Min
180
180
Max
-
-
-
Mcpd
6.5
-
7
-
6.8
7.5
-
8
-
8
ns
Synthesizer
Phase Noise
Floor
Pin
Capacitance
Input
Voltages
Output
Voltages
-160
PDNF
Cin
Cout
VIL
VIH
VOL
VOH
IOL
Logic
OSCout
dBc/
Hz
10
10
1.5
-
0.05
-
-
-
-
-
-
3.5
-
4.95
1.5
-
.05
-
-
-
-
3.5
-
4.95
1.6
0.8
-1.6
-0.8
10
10
1.5
-
0.05
-
-
-
-
-
mA
mA
mA
mA
VOL = 0.40
VOH = 4.0
VOH = 4.0
fosc=fin=10
MHz
fosc=fin=0
VIL = 0
-
-
1
3.5
-
4.95
2.4
1.2
-2.4
-1.2
10
10
1.5
-
0.05
-
-
-
-
-
-
3.5
-
4.95
1.5
-
0.05
-
-
-
-
3.5
-
4.95
2.0
2.0
-2.0
-1.0
6
6
2.75
2.75
0.0
5.0
2.8
1.4
-2.8
-1.4
pF
pF
Vdc
Vdc
Static
Output
Current
IOH
Logic
OSCout
Supply
Currents
IDD
ISB
IPU
-
150
-
40
50
150
-
150
uA
uA
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 FAX 408-263-6571
Page 4 of 12
IMI145152
February 1996
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL TUNING PLL FREQUENCY SYNTHESIZER
PLL OPERATING CHARACTERISTICS
VDD = 3 VOLTS
-40ºC
Characteristics
fin,
Operating
Frequency
Modulus
Control Prop.
Dealy
Dynamic
0ºC
Min
130
130
Max
-
-
Min
130
130
25ºC
Typ
140
150
Max
-
-
70ºC
Min
120
120
Max
-
-
85ºC
Min
110
110
Max
-
-
Unit
Mhz
Mhz
Mhz
Conditions
Symbol
Sine
Square
fosc
Min
140
140
Max
-
-
-
Mcpd
10
-
10.5
-
10.5
11
-
12
-
12.5
ns
Synthesizer
Phase Noise
Floor
Pin
Capacitance
Input
Voltages
Output
Voltages
-155
PDNF
Cin
Cout
VIL
VIH
VOL
VOH
IOL
Logic
OSCout
dBc/
Hz
10
10
0.9
-
0.05
-
-
-
-
-
-
2.95
0.05
-
-
-
-
2.1
-
2.95
0.8
0.4
-0.8
-0.4
10
10
0.9
-
0.05
-
-
-
-
-
mA
mA
mA
mA
VOL = 0.30
VOH=2.4
VOH = 2.4
fosc=fin=10
MHz
fosc=fin=0
VIL = 0
-
-
-
2.1
-
2.95
1.6
0.8
-1.6
-0.8
10
10
0.9
-
0.05
-
-
-
-
-
-
2.95
0.05
-
-
-
-
2.1
-
2.95
1.4
0.7
-1.4
-0.7
6
6
1.35
1.65
0.0
3.0
2.0
1.0
-2.0
-1.0
pF
pF
Vdc
Vdc
Static
Output
Current
IOH
Logic
OSCout
Supply
Currents
IDD
ISB
IPU
-
150
-
40
30
150
-
150
uA
uA
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 FAX 408-263-6571
Page 5 of 12
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