IMP52 4 1/42
D
ATA
C
OMMUNICATIONS
A
DVANCE
P
RODUCT
I
NFORMATION
Key Features
x
x
x
x
x
x
Auto-selectable LVD or single-ended termination
3.0pF maximum disabled output capacitance
Fast response, no external capacitors required
Compatible with active negation drivers
15µA supply current in disconnect mode
Logic command disconnects all termination lines
9-Line Multimode LVD/SE
SCSI Terminator
The IMP5241/42 is a multimode SCSI terminator that conforms to the
SCSI Parallel Interconnect-2 (SPI-2) specification developed by the T10
standards committee for low voltage differential (LVD) termination,
while providing backwards compatibility to the SCSI, SCSI-2, and SPI
single-ended specifications. Multimode compatibility permits the use of
legacy devices on the bus without hardware alterations. Automatic mode
selection is achieved through voltage detection on the diffsense line.
The IMP5241/42 delivers the ultimate in SCSI bus performance while
saving component cost and board area. Elimination of the external capac-
itors also mitigates the need for a lengthy capacitor selection process. The
individual high bandwidth drivers also maximize channel separation
and reduce channel to channel noise and cross talk. The high bandwidth
architecture insures ULTRA2 performance while providing a clear migra-
tion path to ULTRA3 and beyond.
When the IMP5241/42 is enabled, the differential sense (DIFFSENSE) pin
supplies a voltage between 1.2V and 1.4V. In application, this pin is tied
to the DIFFSENSE input of the corresponding LVD transceivers. This
action enables the LVD transceiver function. DIFFSENSE is capable of
supplying a maximum of 15mA. Tying the DIFFSENSE pin HIGH places
the IMP5241/42 in a high impedance state indicating the presence of an
HVD device. Tying the pin LOW places the part in a single-ended mode
while also signaling the multimode transceiver to operate in a single-
ended mode.
Recognizing the needs of portable and configurable peripherals, the
IMP5241/42 have a TTL compatible sleep/disable mode. During this
x
DIFFSENSE line driver
x
Ground driver integrated for single-ended
operation
x
Current limit and thermal protection
x
Hot-swap compatible (single-ended)
x
Compatible with SCSI 1, 2, 3, FAST-20, and the
pending SPI-2 LVD
x
Pin compatible with DS2118 and UCC5630
sleep/disable mode, power dissipation is reduced to a
meager 15µA while also placing all outputs in a high
impedance state. Also during sleep/disable mode, the
DIFFSENSE function is disabled and is placed in a high
impedance state.
Another key feature of the IMP5241/42 is the master/slave
function. Driving this pin HIGH or floating the pin enables
the 1.3V DIFFSENSE reference. Driving the pin LOW dis-
ables the on board DIFFSENSE reference and enables use
of an external master reference device.
Block Diagram
V
TERM
DISCONNECT
(IMP5241)
DISCONNECT
(IMP5242)
LVD
1.25V
M/S
10mA
1.07mA
MODE Control & Delay
Window SE
Comp.
HVD
20kΩ
DIFF B
Power ON
LVD
Power ON & MODE Delay
5241/42_01.eps
SE 2.85V, 22.5mA
Internal V
REF
1.30V
Power ON
SE
2.2V
1.07mA
200
52.5
52.5
20
SE
DISC/HVD
LVD
1 of 9
LVD(-) / SE
SE
HVD
LVD
LVD(+) / SE
(Pseudo-GND)
Latch
SE
HVD
LVD
DIFFSENSE
© 2000 IMP, Inc.
408-432-9100/www.impweb.com
1
IMP52 4 1/42
Pin Configuration
SSOP-36
NC
NC
NC
1+
1–
2+
2–
HEATSINK
HEATSINK
1
2
3
4
5
6
7
8
9
IMP5241/42
36 V
TERM
35 HVD
34 LVD
33 SE
32 9–
31 9+
30 8–
29 8+
28 HEATSINK
27 HEATSINK
26 HEATSINK
25 7–
24 7+
23 6–
22 6+
21 DIFF B
20 DIFFSENSE
19 MASTER/SLAVE
1+
1–
2+
2–
3+
3–
4+
4–
5+
TSSOP-24
1
2
3
4
5
6
7
8
9
IMP5241/42
24 V
TERM
23 NC
22 9–
21 9+
20 8–
19 8+
18 7–
17 7+
16 6–
15 6+
14 DIFFSENSE
13 MASTER/SLAVE
5241/42_03.eps
HEATSINK 10
3+ 11
3– 12
4+ 13
4 – 14
5+ 15
5– 16
*DISCONNECT 17
GND 18
5– 10
*DISCONNECT 11
GND 12
DW Package
*DISCONNECT for IMP5242
DB Package
*DISCONNECT for IMP5242
5241/42_02.eps
Ordering Information
Part Number
IMP5241CDB
IMP5242CDB
IMP5241CPW
IMP5242CPW
Temperature Range
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
Package
36-pin Plastic SSOP
36-pin Plastic SSOP
24-pin Plastic TSSOP
24-pin Plastic TSSOP
5241/42_t02.eps
Note:
For Tape and Reel, append the letter “T” to part number. (i.e. IMP5241CDBT)
Absolute Maximum Ratings
1
TermPwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . +7V
Operating Junction Temperature
Plastic (DB, PW Packages) . . . . . . . . . . . . . 150°C
Storage Temperature Range . . . . . . . . . . . . . . –65°C to 150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . 300°C
Note:
1. Exceeding these ratings could cause damage to the device. All
voltages are with respect to Ground. Currents are positive
into, negative out of the specified terminal.
Thermal Data
DB Package:
Thermal Resistance Junction-to-Ambient,
θ
JA
. . . . . . 50°C/W
PW Package:
Thermal Resistance Junction-to-Ambient,
θ
JA
. . . . . . 100°C/W
2
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
The
θ
JA
numbers are guidelines for the thermal performance of
the device/pc-board system. No ambient airflow is assumed.
408-432-9100/www.impweb.com
© 2000 IMP, Inc.
IMP52 4 1/42
Pin Description
Pin Name
1-, 2-, 3-, 4-, 5-, 6-, 7-, 8-, 9-
V
TERM
Function
Negative signal termination lines for LVD mode. Signal termination lines for SE mode.
Power supply pin for terminator. Connect to SCSI bus TermPwr. Must be decoupled by one
4.7
µ
F low-ESR capacitor for every three terminator devices. It is absolutely necessary to
connect this pin to the decoupling capacitor through a very low impedance (big traces on PCB).
Keeping distances very short from the decoupling capacitors to the V
TERM
pin is also critical.
The value of the decoupling capacitor is somewhat layout dependant and some applications
may benefit from an additional 0.1
µ
F decoupling capacitor at the V
TERM
pin.
Enables / disables terminator. See Table 2 for logic levels.
Terminator ground pin. Connect to ground.
Sometimes referred to as M/S pin. Used to select which terminator is the controlling device.
MASTER/SLAVE pin HIGH or Open enables the DIFFSENSE output drive. See Table 1.
This is a dual function pin. It drives the SCSI bus DIFFSENS line. It is also the sense pin to
detect the SCSI bus mode (LVD, SE or HVD). DIFFSENSE output drive can be disabled with a
LOW level on the MASTER/SLAVE pin. See Table 1 and Table 2. Internally connected to DIFF
B pin through 20k
Ω
resistor.
Internally connected to DIFFSENSE pin through 20k
Ω
resistor. It can be used as a mode sense
pin when the device is a non-controlling terminator (MASTER/SLAVE pin is LOW). An RC filter
(20k
Ω
/ 0.1
µ
F) is not required on the IMP5241/42, as it has an internal timer.
Single-ended output. When HIGH, the terminator is operating in SE mode.
Low Voltage Differential output. When HIGH, the terminator is operating in LVD mode.
High Voltage Differential output. When HIGH, the terminator is operating in HVD mode.
Attached to die mounting pad, but not bonded to GND pin. Pins should be considered a heat
sink only, and not a true ground connection. It is recommeneded that these pins be connected to
ground, but can be left floating.
5241/42_t08.at3
1+, 2+, 3+, 4+, 5+, 6+, 7+, 8+, 9+ Positive signal termination lines for LVD mode. Pseudo-ground lines for SE mode.
DISCONNECT (IMP5241)
DISCONNECT (IMP5242)
GND
MASTER / SLAVE
DIFFSENSE
DIFF B
SE
LVD
HV D
HEATSINK
© 2000 IMP, Inc.
Data Communications
3
IMP52 4 1/42
Recommended Operating Conditions
2
Parameter
TermPwr Voltage
LVD
SE
Signal Line Voltage
Disconnect Input Voltage
Operating Virtual Junction Temperature Range —IMP5241C/5242C
Symbol
V
TERM
Min
3.0
3.5
0
0
0
Typ
Max
5.25
5.25
5.0
V
TERM
70
Units
V
V
V
°C
5241/42_t03.eps
Note:
2. Range over which the device is functional.
Electrical Characteristics
Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0°C
≤
T
A
≤
70°C. TermPwr = 4.75V.
DISCONNECT: IMP5241 = LOW, DISCONNECT: IMP5242 = HIGH. Low duty cycle pulse testing techniques are used which maintain
junction and case temperatures equal to the ambient temperature.
Parameter
LVD Terminator Section
TermPwr Supply Current
Symbol Condition
LVD
ICC
All terminator lines = Open
IMP5241: DISCONNECT > 2.0V
IMP5242: DISCONNECT < 0.8V
Open circuit between – and + (see Note 3)
V
OUT
differential = –1V to 1V
0V to 2.5V
IMP5241: DISCONNECT > 2.0V
IMP5242: DISCONNECT < 0.8V
IMP5241: DISCONNECT > 2.0V
IMP5242: DISCONNECT < 0.8V
V
LINE
= 0V to 4V, T
A
= 25°C
IMP5241: DISCONNECT > 2.0V
IMP5242: DISCONNECT < 0.8V
V
TERM
= 0V, V
LINE
= 2.7V
DIFFSENSE = 1.4V to 0V
Min Typ Max Units
25
15
1.125
100
100
100
1.25
112
105
200
2.5
30
35
1.375
125
110
300
mA
µA
V
mV
Ω
Ω
pF
µA
Common Mode Voltage
Offset Voltage
Differential Terminator Impedance
Common Mode Impedance
Output Capacitance
Output Leakage
V
CM
V
FSB
Z
D
Z
CM
C
O
I
LEAK
2
1
Mode Change Delay
DIFFSENSE Section
DIFFSENSE Output Voltage
DIFFSENSE Output Source Current
DIFFSENSE Sink Current
DIFFSENSE Output Leakage
t
DF
V
DIFF
I
DIFF
I
SINK (DIFF)
I
LEAK (DIFF)
115
1.2
5.0
1.3
1.4
15.0
200
10
ms
V
mA
µA
µA
V
DIFF
= 0V
V
DIFF
= 2.75V
IMP5241: DISCONNECT > 2.0V
IMP5242: DISCONNECT < 0.8V
T
A
= 25°C
All terminator lines = Open, MASTER/SLAVE = 0V
All terminator lines = 0.2V, MASTER/SLAVE = 0V
IMP5241: DISCONNECT > 2.0V
IMP5242: DISCONNECT < 0.8V
V
OUT
= 0.2V
Single-Ended Terminator Section
TermPwr Supply Current
SE I
CC
7
214
15
2.6
21
2.85
23
10
226
35
mA
µA
V
mA
5241/42_t04.eps
Terminator Output High Voltage
Output Current
V
O
I
O
24
Note:
4
3. Open circuit failsafe voltage.
408-432-9100/www.impweb.com
© 2000 IMP, Inc.
IMP52 4 1/42
Electrical Characteristics
Parameter
Symbol Condition
V
OUT
= 4V, all lines
IMP5241: DISCONNECT > 2.0V
IMP5242: DISCONNECT < 0.8V
IMP5241: DISCONNECT > 2.0V
IMP5242: DISCONNECT < 0.8V
V
OUT
= 0V to 4V, T
A
= 25°C
IMP5241: DISCONNECT > 2.0V
IMP5242: DISCONNECT < 0.8V
V
TERM
= 0V, V
LINE
= 2.7V, T
A
= 25°C
I = 1mA
Min Typ Max Units
45
65
2.5
2
mA
pF
µA
Single-Ended Terminator Section (cont.)
Sink Current
I
SINK
Output Capacitance
C
O
Leakage Current
I
LEAK
1
Ground Driver Impedance
Thermal Shutdown
DISCONNECT Section
DISCONNECT Thresholds
Input Current
Z
G
100
150
Ω
°C
V
µA
nA
nA
µA
V
µA
nA
5241/42_t05.at3
V
TH
I
IL
I
IL
I
IH
I
IH
V
TH (MS)
I
IL (MS)
I
IL (MS)
0.8
IMP5241: DISCONNECT = 0V
IMP5242: DISCONNECT = 0V
IMP5241: DISCONNECT = 2.4V
IMP5242: DISCONNECT = 2.4V
0.8
MASTER/SLAVE = 0V
MASTER/SLAVE = 2.4V
100
100
100
2.0
10
10
2.0
10
MASTER/SLAVE Section
MASTER/SLAVE Thresholds
Input Current
© 2000 IMP, Inc.
Data Communications
5
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