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X5169PIT1

Description
IC,SERIAL EEPROM,2KX8,CMOS,DIP,8PIN,PLASTIC
Categorystorage    storage   
File Size364KB,19 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric View All

X5169PIT1 Overview

IC,SERIAL EEPROM,2KX8,CMOS,DIP,8PIN,PLASTIC

X5169PIT1 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerRenesas Electronics Corporation
Reach Compliance Codenot_compliant
Data retention time - minimum100
Durability100000 Write/Erase Cycles
JESD-30 codeR-PDIP-T8
JESD-609 codee0
memory density16384 bit
Memory IC TypeEEPROM
memory width8
Number of terminals8
word count2048 words
character code2000
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize2KX8
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP8,.3
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Serial bus typeSPI
Maximum standby current0.000001 A
Maximum slew rate0.005 mA
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
write protectHARDWARE/SOFTWARE
Base Number Matches1
®
X5168, X5169
(Replaces X25268, X25169)
Data Sheet
September 16, 2005
FN8130.1
CPU Supervisor with 16Kbit SPI EEPROM
These devices combine three popular functions, Power-on
Reset Control, Supply Voltage Supervision, and Block Lock
Protect Serial EEPROM Memory in one package. This
combination lowers system cost, reduces board space
requirements, and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor can execute code.
The device’s low V
CC
detection circuitry protects the user’s
system from low voltage conditions by holding
RESET/RESET active when V
CC
falls below a minimum V
CC
trip point. RESET/RESET remains asserted until V
CC
returns
to proper operating level and stabilizes. Five industry
standard V
TRIP
thresholds are available, however, Intersil’s
unique circuits allow the threshold to be reprogrammed to
meet custom requirements or to fine-tune the threshold in
applications requiring higher precision.
Features
• Low V
CC
Detection and Reset Assertion
- Five standard reset threshold voltages
- Re-program low V
CC
reset threshold voltage using
special programming sequence
- Reset signal valid to V
CC
= 1V
• Long Battery Life with Low Power Consumption
- <50µA max standby current, watchdog on
- <1µA max standby current, watchdog off
- <400µA max active current during read
• 16Kbits of EEPROM
• Built-in Inadvertent Write Protection
- Power-up/power-down protection circuitry
- Protect 0, 1/4, 1/2 or all of EEPROM array with Block
Lock
protection
- In circuit programmable ROM mode
• 2MHz SPI Interface Modes (0,0 & 1,1)
• Minimize EEPROM Programming Time
- 32-byte page write mode
- Self-timed write cycle
- 5ms write cycle time (typical)
• 2.7V to 5.5V and 4.5V to 5.5V Power Supply
Operation
• Available Packages
- 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
• Pb-Free Plus Anneal Available (RoHS Compliant)
Block Diagram
WP
SI
SO
SCK
CS
Data
Register
Command
Decode &
Control
Logic
Protect Logic
Status
Register
4Kbits
4Kbits
8Kbits
EEPROM Array
Reset
Timebase
RESET/RESET
V
CC
V
TRIP
+
-
Power-on and
Low Voltage
Reset
Generation
X5168 = RESET
X5169 = RESET
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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