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LTC2656BIUFD-L16PBF

Description
Octal 16-/12-Bit Rail-to-Rail DACs with 10ppm/∑C Max Reference
File Size289KB,24 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
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LTC2656BIUFD-L16PBF Overview

Octal 16-/12-Bit Rail-to-Rail DACs with 10ppm/∑C Max Reference

LTC2656
Octal 16-/12-Bit Rail-to-Rail
DACs with 10ppm/°C
Max Reference
FEATURES
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DESCRIPTION
The LTC
®
2656 is a family of octal 16-/12-bit rail-to-rail
DACs with a precision integrated reference. The DACs have
built-in high performance, rail-to-rail, output buffers and
are guaranteed monotonic.The LTC2656-L has a full-scale
output of 2.5V with the integrated 10ppm/°C reference and
operates from a single 2.7V to 5.5V supply. The LTC2656-H
has a full-scale output of 4.096V with the integrated refer-
ence and operates from a 4.5V to 5.5V supply. Each DAC can
also operate with an external reference, which sets the DAC
full-scale output to two times the external reference voltage.
These DACs communicate via a SPI/MICROWIRE™ com-
patible 4-wire serial interface which operates at clock rates
up to 50MHz. The LTC2656 incorporates a power-on reset
circuit that is controlled by the PORSEL pin. If PORSEL
is tied to GND the DACs reset to zero-scale. If PORSEL is
tied to V
CC
, the DACs reset to mid-scale.
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5396245, 6891433.
Precision 10ppm/°C Max Reference
Maximum INL Error: ±4LSB at 16 Bits
Guaranteed Monotonic over Temperature
Selectable Internal or External Reference
2.7V to 5.5V Supply Range (LTC2656-L)
Integrated Reference Buffers
Ultralow Crosstalk Between DACs(<1nV•s)
Power-On-Reset to Zero-Scale/Mid-scale
Asynchronous LDAC Update Pin
Tiny 20-Lead 4mm
×
5mm QFN and 20-Lead
Thermally Enhanced TSSOP Packages
APPLICATIONS
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Mobile Communications
Process Control and Industrial Automation
Instrumentation
Automatic Test Equipment
Automotive
BLOCK DIAGRAM
REFCOMP
GND
REGISTER
REGISTER
REGISTER
REGISTER
REFLO
V
OUTA
DAC A
REF
V
CC
DAC H
REF
4
REGISTER
REGISTER
REGISTER
REGISTER
3
DAC G
REF
V
OUTG
INL (LSB)
2
1
0
–1
DAC F
REF
V
OUTF
–2
–3
–4
128
DAC E
V
OUTE
16384
DAC A
DAC B
DAC C
DAC D
32768
CODE
2656 TA01
REF
INTERNAL REFERENCE
REF
REFIN/OUT
V
OUTH
INL vs Code
V
OUTB
DAC B
REF
REGISTER
REGISTER
REGISTER
V
OUTC
DAC C
REF
REGISTER
DAC E
DAC F
DAC G
DAC H
49152
65535
REGISTER
REGISTER
REGISTER
V
OUTD
DAC D
REGISTER
CS/LD
CONTROL LOGIC
SCK
LDAC
32-BIT SHIFT REGISTER
DECODE
POWER-ON RESET
PORSEL
SDO
SDI
CLR
2656 BD
2656f
1

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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